iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/i915: Don't forget to reset blocks when testing lower wm levels

Browse Source 
During DDB allocation, we try to distribute enough blocks for each plane
to hit the highest watermark level; if that fails, we retry each lower
level (which should require fewer blocks) until we find one that's
possible (or until the whole commit is rejected as impossible).  We need
to reset our running block count when trying each lower level, otherwise
all lower levels will fail as well.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: d8e8749802 ("drm/i915: Switch to level-based DDB allocation algorithm (v5)")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181212191720.3706-1-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2018-12-12 11:17:20 -08:00
parent bea68f4a5f
commit 25db2eaf10
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/i915/intel_pm.c
View File

@ -4365,6 +4365,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
* requirement of active planes.
*/
for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) {
blocks = 0;
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
if (plane_id == PLANE_CURSOR)
continue;