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drm/i915/dsb: Use non-posted register writes for legacy LUT

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The DSB has problems writing the legacy LUT. The two workarounds
I've discoverted are:
- write each entry twice back to back
- use non-posted writes

Let's use non-posted writes as that seems a bit more standard.

TODO: measure which is faster

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-14-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
This commit is contained in:
Ville Syrjälä 2023-06-06 22:14:58 +03:00
parent 5ae0da3fc7
commit 25ea3411bd
1 changed files with 11 additions and 0 deletions
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11
drivers/gpu/drm/i915/display/intel_color.c
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@ -1329,9 +1329,20 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state,
lut = blob->data;
/*
* DSB fails to correctly load the legacy LUT
* unless we either write each entry twice,
* or use non-posted writes
*/
if (crtc_state->dsb)
intel_dsb_nonpost_start(crtc_state->dsb);
for (i = 0; i < 256; i++)
ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
i9xx_lut_8(&lut[i]));
if (crtc_state->dsb)
intel_dsb_nonpost_end(crtc_state->dsb);
}
static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state,