iommu/amd: Enable PCI features based on attached domain capability
Commit eda8c2860ab6 ("iommu/amd: Enable device ATS/PASID/PRI capabilities independently") changed the way it enables device capability while attaching devices. I missed to account the attached domain capability. Meaning if domain is not capable of handling PASID/PRI (ex: paging domain with v1 page table) then enabling device feature is not required. This patch enables PASID/PRI only if domain is capable of handling SVA. Also move pci feature enablement to do_attach() function so that we make SVA capability in one place. Finally make PRI enable/disable functions as static functions. Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20240418103400.6229-9-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
parent
c9e8701132
commit
25efbb0558
@ -46,10 +46,6 @@ extern int amd_iommu_gpt_level;
|
||||
|
||||
bool amd_iommu_pasid_supported(void);
|
||||
|
||||
/* Device capabilities */
|
||||
int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev);
|
||||
void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev);
|
||||
|
||||
/* GCR3 setup */
|
||||
int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data,
|
||||
ioasid_t pasid, unsigned long gcr3);
|
||||
|
@ -399,7 +399,7 @@ static inline void pdev_disable_cap_ats(struct pci_dev *pdev)
|
||||
}
|
||||
}
|
||||
|
||||
int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev)
|
||||
static inline int pdev_enable_cap_pri(struct pci_dev *pdev)
|
||||
{
|
||||
struct iommu_dev_data *dev_data = dev_iommu_priv_get(&pdev->dev);
|
||||
int ret = -EINVAL;
|
||||
@ -407,6 +407,9 @@ int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev)
|
||||
if (dev_data->pri_enabled)
|
||||
return 0;
|
||||
|
||||
if (!dev_data->ats_enabled)
|
||||
return 0;
|
||||
|
||||
if (dev_data->flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) {
|
||||
/*
|
||||
* First reset the PRI state of the device.
|
||||
@ -423,7 +426,7 @@ int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev)
|
||||
static inline void pdev_disable_cap_pri(struct pci_dev *pdev)
|
||||
{
|
||||
struct iommu_dev_data *dev_data = dev_iommu_priv_get(&pdev->dev);
|
||||
|
||||
@ -465,15 +468,14 @@ static void pdev_enable_caps(struct pci_dev *pdev)
|
||||
{
|
||||
pdev_enable_cap_ats(pdev);
|
||||
pdev_enable_cap_pasid(pdev);
|
||||
amd_iommu_pdev_enable_cap_pri(pdev);
|
||||
|
||||
pdev_enable_cap_pri(pdev);
|
||||
}
|
||||
|
||||
static void pdev_disable_caps(struct pci_dev *pdev)
|
||||
{
|
||||
pdev_disable_cap_ats(pdev);
|
||||
pdev_disable_cap_pasid(pdev);
|
||||
amd_iommu_pdev_disable_cap_pri(pdev);
|
||||
pdev_disable_cap_pri(pdev);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2035,6 +2037,7 @@ static int do_attach(struct iommu_dev_data *dev_data,
|
||||
struct protection_domain *domain)
|
||||
{
|
||||
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
|
||||
struct pci_dev *pdev;
|
||||
int ret = 0;
|
||||
|
||||
/* Update data structures */
|
||||
@ -2049,10 +2052,16 @@ static int do_attach(struct iommu_dev_data *dev_data,
|
||||
domain->dev_iommu[iommu->index] += 1;
|
||||
domain->dev_cnt += 1;
|
||||
|
||||
pdev = dev_is_pci(dev_data->dev) ? to_pci_dev(dev_data->dev) : NULL;
|
||||
if (pdom_is_sva_capable(domain)) {
|
||||
ret = init_gcr3_table(dev_data, domain);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (pdev)
|
||||
pdev_enable_caps(pdev);
|
||||
} else if (pdev) {
|
||||
pdev_enable_cap_ats(pdev);
|
||||
}
|
||||
|
||||
/* Update device table */
|
||||
@ -2107,9 +2116,6 @@ static int attach_device(struct device *dev,
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (dev_is_pci(dev))
|
||||
pdev_enable_caps(to_pci_dev(dev));
|
||||
|
||||
ret = do_attach(dev_data, domain);
|
||||
|
||||
out:
|
||||
|
Loading…
x
Reference in New Issue
Block a user