Linux 3.12-rc4
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJSUc9zAAoJEHm+PkMAQRiG9DMH/AtpuAF6LlMRPjrCeuJQ1pyh T0IUO+CsLKO6qtM5IyweP8V6zaasNjIuW1+B6IwVIl8aOrM+M7CwRiKvpey26ldM I8G2ron7hqSOSQqSQs20jN2yGAqQGpYIbTmpdGLAjQ350NNNvEKthbP5SZR5PAmE UuIx5OGEkaOyZXvCZJXU9AZkCxbihlMSt2zFVxybq2pwnGezRUYgCigE81aeyE0I QLwzzMVdkCxtZEpkdJMpLILAz22jN4RoVDbXRa2XC7dA9I2PEEXI9CcLzqCsx2Ii 8eYS+no2K5N2rrpER7JFUB2B/2X8FaVDE+aJBCkfbtwaYTV9UYLq3a/sKVpo1Cs= =xSFJ -----END PGP SIGNATURE----- Merge tag 'v3.12-rc4' into devel Linux 3.12-rc4
This commit is contained in:
Linus Walleij
commit
263c43a447
3
CREDITS
3
CREDITS
@ -2808,8 +2808,7 @@ S: Ottawa, Ontario
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|||||||
S: Canada K2P 0X8
|
S: Canada K2P 0X8
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||||||
|
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N: Mikael Pettersson
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N: Mikael Pettersson
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E: mikpe@it.uu.se
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E: mikpelinux@gmail.com
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W: http://user.it.uu.se/~mikpe/linux/
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D: Miscellaneous fixes
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D: Miscellaneous fixes
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||||||
|
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N: Reed H. Petty
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N: Reed H. Petty
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@ -18,17 +18,17 @@ this byte for application use, with the following caveats:
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|||||||
parameters containing user virtual addresses *must* have
|
parameters containing user virtual addresses *must* have
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their top byte cleared before trapping to the kernel.
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their top byte cleared before trapping to the kernel.
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|
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(2) Tags are not guaranteed to be preserved when delivering
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(2) Non-zero tags are not preserved when delivering signals.
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signals. This means that signal handlers in applications
|
This means that signal handlers in applications making use
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making use of tags cannot rely on the tag information for
|
of tags cannot rely on the tag information for user virtual
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user virtual addresses being maintained for fields inside
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addresses being maintained for fields inside siginfo_t.
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siginfo_t. One exception to this rule is for signals raised
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One exception to this rule is for signals raised in response
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in response to debug exceptions, where the tag information
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to watchpoint debug exceptions, where the tag information
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will be preserved.
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will be preserved.
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(3) Special care should be taken when using tagged pointers,
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(3) Special care should be taken when using tagged pointers,
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since it is likely that C compilers will not hazard two
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since it is likely that C compilers will not hazard two
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addresses differing only in the upper bits.
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virtual addresses differing only in the upper byte.
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|
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The architecture prevents the use of a tagged PC, so the upper byte will
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The architecture prevents the use of a tagged PC, so the upper byte will
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be set to a sign-extension of bit 55 on exception return.
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be set to a sign-extension of bit 55 on exception return.
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@ -6,6 +6,8 @@ capability.txt
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- Generic Block Device Capability (/sys/block/<device>/capability)
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- Generic Block Device Capability (/sys/block/<device>/capability)
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cfq-iosched.txt
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cfq-iosched.txt
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- CFQ IO scheduler tunables
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- CFQ IO scheduler tunables
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cmdline-partition.txt
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- how to specify block device partitions on kernel command line
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data-integrity.txt
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data-integrity.txt
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- Block data integrity
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- Block data integrity
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deadline-iosched.txt
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deadline-iosched.txt
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@ -1,9 +1,9 @@
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Embedded device command line partition
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Embedded device command line partition parsing
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=====================================================================
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=====================================================================
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Read block device partition table from command line.
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Support for reading the block device partition table from the command line.
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The partition used for fixed block device (eMMC) embedded device.
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It is typically used for fixed block (eMMC) embedded devices.
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It is no MBR, save storage space. Bootloader can be easily accessed
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It has no MBR, so saves storage space. Bootloader can be easily accessed
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by absolute address of data on the block device.
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by absolute address of data on the block device.
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Users can easily change the partition.
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Users can easily change the partition.
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@ -1,11 +1,11 @@
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* Samsung Exynos specific extensions to the Synopsis Designware Mobile
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* Samsung Exynos specific extensions to the Synopsys Designware Mobile
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Storage Host Controller
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Storage Host Controller
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The Synopsis designware mobile storage host controller is used to interface
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The Synopsys designware mobile storage host controller is used to interface
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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differences between the core Synopsis dw mshc controller properties described
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differences between the core Synopsys dw mshc controller properties described
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by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific
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by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
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extensions to the Synopsis Designware Mobile Storage Host Controller.
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extensions to the Synopsys Designware Mobile Storage Host Controller.
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Required Properties:
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Required Properties:
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@ -1,11 +1,11 @@
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* Rockchip specific extensions to the Synopsis Designware Mobile
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* Rockchip specific extensions to the Synopsys Designware Mobile
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Storage Host Controller
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Storage Host Controller
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|
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The Synopsis designware mobile storage host controller is used to interface
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The Synopsys designware mobile storage host controller is used to interface
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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differences between the core Synopsis dw mshc controller properties described
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differences between the core Synopsys dw mshc controller properties described
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by synopsis-dw-mshc.txt and the properties used by the Rockchip specific
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by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
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extensions to the Synopsis Designware Mobile Storage Host Controller.
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extensions to the Synopsys Designware Mobile Storage Host Controller.
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Required Properties:
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Required Properties:
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@ -1,14 +1,14 @@
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* Synopsis Designware Mobile Storage Host Controller
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* Synopsys Designware Mobile Storage Host Controller
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The Synopsis designware mobile storage host controller is used to interface
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The Synopsys designware mobile storage host controller is used to interface
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
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differences between the core mmc properties described by mmc.txt and the
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differences between the core mmc properties described by mmc.txt and the
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properties used by the Synopsis Designware Mobile Storage Host Controller.
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properties used by the Synopsys Designware Mobile Storage Host Controller.
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Required Properties:
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Required Properties:
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* compatible: should be
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* compatible: should be
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- snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
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- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
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* #address-cells: should be 1.
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* #address-cells: should be 1.
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* #size-cells: should be 0.
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* #size-cells: should be 0.
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@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
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described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
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described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
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optional bindings can be used.
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optional bindings can be used.
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Required properties:
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- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
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"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
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"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
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"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
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"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
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"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
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"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
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"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
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Optional properties:
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Optional properties:
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- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
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- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
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When used with Renesas SDHI hardware, the following compatibility strings
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configure various model-specific properties:
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"renesas,sh7372-sdhi": (default) compatible with SH7372
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"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
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wait for the interface to become idle.
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@ -86,6 +86,7 @@ General Properties:
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Clock Properties:
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Clock Properties:
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- fsl,cksel Timer reference clock source.
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- fsl,tclk-period Timer reference clock period in nanoseconds.
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- fsl,tclk-period Timer reference clock period in nanoseconds.
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- fsl,tmr-prsc Prescaler, divides the output clock.
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- fsl,tmr-prsc Prescaler, divides the output clock.
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- fsl,tmr-add Frequency compensation value.
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- fsl,tmr-add Frequency compensation value.
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@ -97,7 +98,7 @@ Clock Properties:
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clock. You must choose these carefully for the clock to work right.
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clock. You must choose these carefully for the clock to work right.
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Here is how to figure good values:
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Here is how to figure good values:
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TimerOsc = system clock MHz
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TimerOsc = selected reference clock MHz
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tclk_period = desired clock period nanoseconds
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tclk_period = desired clock period nanoseconds
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NominalFreq = 1000 / tclk_period MHz
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NominalFreq = 1000 / tclk_period MHz
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FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
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FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
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@ -114,6 +115,20 @@ Clock Properties:
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Pulse Per Second (PPS) signal, since this will be offered to the PPS
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Pulse Per Second (PPS) signal, since this will be offered to the PPS
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subsystem to synchronize the Linux clock.
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subsystem to synchronize the Linux clock.
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Reference clock source is determined by the value, which is holded
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in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
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value, which will be directly written in those bits, that is why,
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according to reference manual, the next clock sources can be used:
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<0> - external high precision timer reference clock (TSEC_TMR_CLK
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input is used for this purpose);
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<1> - eTSEC system clock;
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<2> - eTSEC1 transmit clock;
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<3> - RTC clock input.
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When this attribute is not used, eTSEC system clock will serve as
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IEEE 1588 timer reference clock.
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Example:
|
Example:
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ptp_clock@24E00 {
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ptp_clock@24E00 {
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@ -121,6 +136,7 @@ Example:
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reg = <0x24E00 0xB0>;
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reg = <0x24E00 0xB0>;
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interrupts = <12 0x8 13 0x8>;
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interrupts = <12 0x8 13 0x8>;
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interrupt-parent = < &ipic >;
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interrupt-parent = < &ipic >;
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fsl,cksel = <1>;
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fsl,tclk-period = <10>;
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fsl,tclk-period = <10>;
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fsl,tmr-prsc = <100>;
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fsl,tmr-prsc = <100>;
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fsl,tmr-add = <0x999999A4>;
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fsl,tmr-add = <0x999999A4>;
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@ -1,4 +1,4 @@
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* Synopsis Designware PCIe interface
|
* Synopsys Designware PCIe interface
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||||||
|
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Required properties:
|
Required properties:
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||||||
- compatible: should contain "snps,dw-pcie" to identify the
|
- compatible: should contain "snps,dw-pcie" to identify the
|
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|||||||
@ -359,11 +359,9 @@ struct inode_operations {
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ssize_t (*listxattr) (struct dentry *, char *, size_t);
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ssize_t (*listxattr) (struct dentry *, char *, size_t);
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int (*removexattr) (struct dentry *, const char *);
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int (*removexattr) (struct dentry *, const char *);
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void (*update_time)(struct inode *, struct timespec *, int);
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void (*update_time)(struct inode *, struct timespec *, int);
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int (*atomic_open)(struct inode *, struct dentry *,
|
int (*atomic_open)(struct inode *, struct dentry *, struct file *,
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|
unsigned open_flag, umode_t create_mode, int *opened);
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int (*tmpfile) (struct inode *, struct dentry *, umode_t);
|
int (*tmpfile) (struct inode *, struct dentry *, umode_t);
|
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} ____cacheline_aligned;
|
|
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struct file *, unsigned open_flag,
|
|
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umode_t create_mode, int *opened);
|
|
||||||
};
|
};
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|
|
||||||
Again, all methods are called without any locks being held, unless
|
Again, all methods are called without any locks being held, unless
|
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@ -470,9 +468,11 @@ otherwise noted.
|
|||||||
method the filesystem can look up, possibly create and open the file in
|
method the filesystem can look up, possibly create and open the file in
|
||||||
one atomic operation. If it cannot perform this (e.g. the file type
|
one atomic operation. If it cannot perform this (e.g. the file type
|
||||||
turned out to be wrong) it may signal this by returning 1 instead of
|
turned out to be wrong) it may signal this by returning 1 instead of
|
||||||
usual 0 or -ve . This method is only called if the last
|
usual 0 or -ve . This method is only called if the last component is
|
||||||
component is negative or needs lookup. Cached positive dentries are
|
negative or needs lookup. Cached positive dentries are still handled by
|
||||||
still handled by f_op->open().
|
f_op->open(). If the file was created, the FILE_CREATED flag should be
|
||||||
|
set in "opened". In case of O_EXCL the method must only succeed if the
|
||||||
|
file didn't exist and hence FILE_CREATED shall always be set on success.
|
||||||
|
|
||||||
tmpfile: called in the end of O_TMPFILE open(). Optional, equivalent to
|
tmpfile: called in the end of O_TMPFILE open(). Optional, equivalent to
|
||||||
atomically creating, opening and unlinking a file in given directory.
|
atomically creating, opening and unlinking a file in given directory.
|
||||||
|
|||||||
@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||||||
Format: <io>,<irq>,<mode>
|
Format: <io>,<irq>,<mode>
|
||||||
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
||||||
|
|
||||||
|
blkdevparts= Manual partition parsing of block device(s) for
|
||||||
|
embedded devices based on command line input.
|
||||||
|
See Documentation/block/cmdline-partition.txt
|
||||||
|
|
||||||
boot_delay= Milliseconds to delay each printk during boot.
|
boot_delay= Milliseconds to delay each printk during boot.
|
||||||
Values larger than 10 seconds (10000) are changed to
|
Values larger than 10 seconds (10000) are changed to
|
||||||
no delay (0).
|
no delay (0).
|
||||||
@ -1357,7 +1361,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||||||
pages. In the event, a node is too small to have both
|
pages. In the event, a node is too small to have both
|
||||||
kernelcore and Movable pages, kernelcore pages will
|
kernelcore and Movable pages, kernelcore pages will
|
||||||
take priority and other nodes will have a larger number
|
take priority and other nodes will have a larger number
|
||||||
of kernelcore pages. The Movable zone is used for the
|
of Movable pages. The Movable zone is used for the
|
||||||
allocation of pages that may be reclaimed or moved
|
allocation of pages that may be reclaimed or moved
|
||||||
by the page migration subsystem. This means that
|
by the page migration subsystem. This means that
|
||||||
HugeTLB pages may not be allocated from this zone.
|
HugeTLB pages may not be allocated from this zone.
|
||||||
@ -3485,6 +3489,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||||||
the unplug protocol
|
the unplug protocol
|
||||||
never -- do not unplug even if version check succeeds
|
never -- do not unplug even if version check succeeds
|
||||||
|
|
||||||
|
xen_nopvspin [X86,XEN]
|
||||||
|
Disables the ticketlock slowpath using Xen PV
|
||||||
|
optimizations.
|
||||||
|
|
||||||
xirc2ps_cs= [NET,PCMCIA]
|
xirc2ps_cs= [NET,PCMCIA]
|
||||||
Format:
|
Format:
|
||||||
<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
|
<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
|
||||||
|
|||||||
@ -1362,6 +1362,12 @@ To add ARP targets:
|
|||||||
To remove an ARP target:
|
To remove an ARP target:
|
||||||
# echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target
|
# echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target
|
||||||
|
|
||||||
|
To configure the interval between learning packet transmits:
|
||||||
|
# echo 12 > /sys/class/net/bond0/bonding/lp_interval
|
||||||
|
NOTE: the lp_inteval is the number of seconds between instances where
|
||||||
|
the bonding driver sends learning packets to each slaves peer switch. The
|
||||||
|
default interval is 1 second.
|
||||||
|
|
||||||
Example Configuration
|
Example Configuration
|
||||||
---------------------
|
---------------------
|
||||||
We begin with the same example that is shown in section 3.3,
|
We begin with the same example that is shown in section 3.3,
|
||||||
|
|||||||
@ -66,9 +66,7 @@ rq->cfs.load value, which is the sum of the weights of the tasks queued on the
|
|||||||
runqueue.
|
runqueue.
|
||||||
|
|
||||||
CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the
|
CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the
|
||||||
p->se.vruntime key (there is a subtraction using rq->cfs.min_vruntime to
|
p->se.vruntime key. CFS picks the "leftmost" task from this tree and sticks to it.
|
||||||
account for possible wraparounds). CFS picks the "leftmost" task from this
|
|
||||||
tree and sticks to it.
|
|
||||||
As the system progresses forwards, the executed tasks are put into the tree
|
As the system progresses forwards, the executed tasks are put into the tree
|
||||||
more and more to the right --- slowly but surely giving a chance for every task
|
more and more to the right --- slowly but surely giving a chance for every task
|
||||||
to become the "leftmost task" and thus get on the CPU within a deterministic
|
to become the "leftmost task" and thus get on the CPU within a deterministic
|
||||||
|
|||||||
@ -296,6 +296,12 @@ Cirrus Logic CS4206/4207
|
|||||||
imac27 IMac 27 Inch
|
imac27 IMac 27 Inch
|
||||||
auto BIOS setup (default)
|
auto BIOS setup (default)
|
||||||
|
|
||||||
|
Cirrus Logic CS4208
|
||||||
|
===================
|
||||||
|
mba6 MacBook Air 6,1 and 6,2
|
||||||
|
gpio0 Enable GPIO 0 amp
|
||||||
|
auto BIOS setup (default)
|
||||||
|
|
||||||
VIA VT17xx/VT18xx/VT20xx
|
VIA VT17xx/VT18xx/VT20xx
|
||||||
========================
|
========================
|
||||||
auto BIOS setup (default)
|
auto BIOS setup (default)
|
||||||
|
|||||||
40
MAINTAINERS
40
MAINTAINERS
@ -824,15 +824,21 @@ S: Maintained
|
|||||||
F: arch/arm/mach-gemini/
|
F: arch/arm/mach-gemini/
|
||||||
|
|
||||||
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
||||||
M: Barry Song <baohua.song@csr.com>
|
M: Barry Song <baohua@kernel.org>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-prima2/
|
F: arch/arm/mach-prima2/
|
||||||
|
F: drivers/clk/clk-prima2.c
|
||||||
|
F: drivers/clocksource/timer-prima2.c
|
||||||
|
F: drivers/clocksource/timer-marco.c
|
||||||
F: drivers/dma/sirf-dma.c
|
F: drivers/dma/sirf-dma.c
|
||||||
F: drivers/i2c/busses/i2c-sirf.c
|
F: drivers/i2c/busses/i2c-sirf.c
|
||||||
|
F: drivers/input/misc/sirfsoc-onkey.c
|
||||||
|
F: drivers/irqchip/irq-sirfsoc.c
|
||||||
F: drivers/mmc/host/sdhci-sirf.c
|
F: drivers/mmc/host/sdhci-sirf.c
|
||||||
F: drivers/pinctrl/sirf/
|
F: drivers/pinctrl/sirf/
|
||||||
|
F: drivers/rtc/rtc-sirfsoc.c
|
||||||
F: drivers/spi/spi-sirf.c
|
F: drivers/spi/spi-sirf.c
|
||||||
|
|
||||||
ARM/EBSA110 MACHINE SUPPORT
|
ARM/EBSA110 MACHINE SUPPORT
|
||||||
@ -1812,7 +1818,8 @@ S: Supported
|
|||||||
F: drivers/net/ethernet/broadcom/bnx2x/
|
F: drivers/net/ethernet/broadcom/bnx2x/
|
||||||
|
|
||||||
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
||||||
M: Christian Daudt <csd@broadcom.com>
|
M: Christian Daudt <bcm@fixthebug.org>
|
||||||
|
L: bcm-kernel-feedback-list@broadcom.com
|
||||||
T: git git://git.github.com/broadcom/bcm11351
|
T: git git://git.github.com/broadcom/bcm11351
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-bcm/
|
F: arch/arm/mach-bcm/
|
||||||
@ -2645,6 +2652,18 @@ F: include/linux/device-mapper.h
|
|||||||
F: include/linux/dm-*.h
|
F: include/linux/dm-*.h
|
||||||
F: include/uapi/linux/dm-*.h
|
F: include/uapi/linux/dm-*.h
|
||||||
|
|
||||||
|
DIGI NEO AND CLASSIC PCI PRODUCTS
|
||||||
|
M: Lidza Louina <lidza.louina@gmail.com>
|
||||||
|
L: driverdev-devel@linuxdriverproject.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/staging/dgnc/
|
||||||
|
|
||||||
|
DIGI EPCA PCI PRODUCTS
|
||||||
|
M: Lidza Louina <lidza.louina@gmail.com>
|
||||||
|
L: driverdev-devel@linuxdriverproject.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/staging/dgap/
|
||||||
|
|
||||||
DIOLAN U2C-12 I2C DRIVER
|
DIOLAN U2C-12 I2C DRIVER
|
||||||
M: Guenter Roeck <linux@roeck-us.net>
|
M: Guenter Roeck <linux@roeck-us.net>
|
||||||
L: linux-i2c@vger.kernel.org
|
L: linux-i2c@vger.kernel.org
|
||||||
@ -4463,6 +4482,13 @@ L: linux-serial@vger.kernel.org
|
|||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/tty/serial/ioc3_serial.c
|
F: drivers/tty/serial/ioc3_serial.c
|
||||||
|
|
||||||
|
IOMMU DRIVERS
|
||||||
|
M: Joerg Roedel <joro@8bytes.org>
|
||||||
|
L: iommu@lists.linux-foundation.org
|
||||||
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/iommu/
|
||||||
|
|
||||||
IP MASQUERADING
|
IP MASQUERADING
|
||||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
@ -6601,7 +6627,7 @@ S: Obsolete
|
|||||||
F: drivers/net/wireless/prism54/
|
F: drivers/net/wireless/prism54/
|
||||||
|
|
||||||
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
||||||
M: Mikael Pettersson <mikpe@it.uu.se>
|
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||||
L: linux-ide@vger.kernel.org
|
L: linux-ide@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/ata/sata_promise.*
|
F: drivers/ata/sata_promise.*
|
||||||
@ -7264,9 +7290,9 @@ F: include/linux/sched.h
|
|||||||
F: include/uapi/linux/sched.h
|
F: include/uapi/linux/sched.h
|
||||||
|
|
||||||
SCORE ARCHITECTURE
|
SCORE ARCHITECTURE
|
||||||
M: Chen Liqin <liqin.chen@sunplusct.com>
|
M: Chen Liqin <liqin.linux@gmail.com>
|
||||||
M: Lennox Wu <lennox.wu@gmail.com>
|
M: Lennox Wu <lennox.wu@gmail.com>
|
||||||
W: http://www.sunplusct.com
|
W: http://www.sunplus.com
|
||||||
S: Supported
|
S: Supported
|
||||||
F: arch/score/
|
F: arch/score/
|
||||||
|
|
||||||
@ -8730,9 +8756,8 @@ F: Documentation/hid/hiddev.txt
|
|||||||
F: drivers/hid/usbhid/
|
F: drivers/hid/usbhid/
|
||||||
|
|
||||||
USB/IP DRIVERS
|
USB/IP DRIVERS
|
||||||
M: Matt Mooney <mfm@muteddisk.com>
|
|
||||||
L: linux-usb@vger.kernel.org
|
L: linux-usb@vger.kernel.org
|
||||||
S: Maintained
|
S: Orphan
|
||||||
F: drivers/staging/usbip/
|
F: drivers/staging/usbip/
|
||||||
|
|
||||||
USB ISP116X DRIVER
|
USB ISP116X DRIVER
|
||||||
@ -9372,6 +9397,7 @@ F: arch/arm64/include/asm/xen/
|
|||||||
|
|
||||||
XEN NETWORK BACKEND DRIVER
|
XEN NETWORK BACKEND DRIVER
|
||||||
M: Ian Campbell <ian.campbell@citrix.com>
|
M: Ian Campbell <ian.campbell@citrix.com>
|
||||||
|
M: Wei Liu <wei.liu2@citrix.com>
|
||||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|||||||
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
|||||||
VERSION = 3
|
VERSION = 3
|
||||||
PATCHLEVEL = 12
|
PATCHLEVEL = 12
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc1
|
EXTRAVERSION = -rc4
|
||||||
NAME = One Giant Leap for Frogkind
|
NAME = One Giant Leap for Frogkind
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|||||||
@ -286,9 +286,6 @@ config HAVE_PERF_USER_STACK_DUMP
|
|||||||
config HAVE_ARCH_JUMP_LABEL
|
config HAVE_ARCH_JUMP_LABEL
|
||||||
bool
|
bool
|
||||||
|
|
||||||
config HAVE_ARCH_MUTEX_CPU_RELAX
|
|
||||||
bool
|
|
||||||
|
|
||||||
config HAVE_RCU_TABLE_FREE
|
config HAVE_RCU_TABLE_FREE
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
|||||||
@ -45,7 +45,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
|||||||
|
|
||||||
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
||||||
{
|
{
|
||||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||||
|
|
||||||
|
__asm__ __volatile__(
|
||||||
|
" ex %0, [%1] \n"
|
||||||
|
: "+r" (tmp)
|
||||||
|
: "r"(&(lock->slock))
|
||||||
|
: "memory");
|
||||||
|
|
||||||
smp_mb();
|
smp_mb();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -43,7 +43,7 @@
|
|||||||
* Because it essentially checks if buffer end is within limit and @len is
|
* Because it essentially checks if buffer end is within limit and @len is
|
||||||
* non-ngeative, which implies that buffer start will be within limit too.
|
* non-ngeative, which implies that buffer start will be within limit too.
|
||||||
*
|
*
|
||||||
* The reason for rewriting being, for majorit yof cases, @len is generally
|
* The reason for rewriting being, for majority of cases, @len is generally
|
||||||
* compile time constant, causing first sub-expression to be compile time
|
* compile time constant, causing first sub-expression to be compile time
|
||||||
* subsumed.
|
* subsumed.
|
||||||
*
|
*
|
||||||
@ -53,7 +53,7 @@
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
||||||
(((addr)+(sz)) <= get_fs()))
|
((addr) <= (get_fs() - (sz))))
|
||||||
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
||||||
likely(__user_ok((addr), (sz))))
|
likely(__user_ok((addr), (sz))))
|
||||||
|
|
||||||
|
|||||||
@ -101,7 +101,6 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
|||||||
{
|
{
|
||||||
struct rt_sigframe __user *sf;
|
struct rt_sigframe __user *sf;
|
||||||
unsigned int magic;
|
unsigned int magic;
|
||||||
int err;
|
|
||||||
struct pt_regs *regs = current_pt_regs();
|
struct pt_regs *regs = current_pt_regs();
|
||||||
|
|
||||||
/* Always make any pending restarted system calls return -EINTR */
|
/* Always make any pending restarted system calls return -EINTR */
|
||||||
@ -119,15 +118,16 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
|||||||
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
err = restore_usr_regs(regs, sf);
|
if (__get_user(magic, &sf->sigret_magic))
|
||||||
err |= __get_user(magic, &sf->sigret_magic);
|
|
||||||
if (err)
|
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
if (unlikely(is_do_ss_needed(magic)))
|
if (unlikely(is_do_ss_needed(magic)))
|
||||||
if (restore_altstack(&sf->uc.uc_stack))
|
if (restore_altstack(&sf->uc.uc_stack))
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
|
if (restore_usr_regs(regs, sf))
|
||||||
|
goto badframe;
|
||||||
|
|
||||||
/* Don't restart from sigreturn */
|
/* Don't restart from sigreturn */
|
||||||
syscall_wont_restart(regs);
|
syscall_wont_restart(regs);
|
||||||
|
|
||||||
@ -190,6 +190,15 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
|||||||
if (!sf)
|
if (!sf)
|
||||||
return 1;
|
return 1;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||||
|
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||||
|
* during signal handler execution. This works for SA_SIGINFO as well
|
||||||
|
* although the semantics are now overloaded (the same reg state can be
|
||||||
|
* inspected by userland: but are they allowed to fiddle with it ?
|
||||||
|
*/
|
||||||
|
err |= stash_usr_regs(sf, regs, set);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SA_SIGINFO requires 3 args to signal handler:
|
* SA_SIGINFO requires 3 args to signal handler:
|
||||||
* #1: sig-no (common to any handler)
|
* #1: sig-no (common to any handler)
|
||||||
@ -213,14 +222,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
|||||||
magic = MAGIC_SIGALTSTK;
|
magic = MAGIC_SIGALTSTK;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
|
||||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
|
||||||
* during signal handler execution. This works for SA_SIGINFO as well
|
|
||||||
* although the semantics are now overloaded (the same reg state can be
|
|
||||||
* inspected by userland: but are they allowed to fiddle with it ?
|
|
||||||
*/
|
|
||||||
err |= stash_usr_regs(sf, regs, set);
|
|
||||||
err |= __put_user(magic, &sf->sigret_magic);
|
err |= __put_user(magic, &sf->sigret_magic);
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|||||||
@ -227,12 +227,9 @@ void __attribute__((weak)) arc_local_timer_setup(unsigned int cpu)
|
|||||||
{
|
{
|
||||||
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
||||||
|
|
||||||
clockevents_calc_mult_shift(clk, arc_get_core_freq(), 5);
|
|
||||||
|
|
||||||
clk->max_delta_ns = clockevent_delta2ns(ARC_TIMER_MAX, clk);
|
|
||||||
clk->cpumask = cpumask_of(cpu);
|
clk->cpumask = cpumask_of(cpu);
|
||||||
|
clockevents_config_and_register(clk, arc_get_core_freq(),
|
||||||
clockevents_register_device(clk);
|
0, ARC_TIMER_MAX);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* setup the per-cpu timer IRQ handler - for all cpus
|
* setup the per-cpu timer IRQ handler - for all cpus
|
||||||
|
|||||||
@ -245,6 +245,12 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
|||||||
regs->status32 &= ~STATUS_DE_MASK;
|
regs->status32 &= ~STATUS_DE_MASK;
|
||||||
} else {
|
} else {
|
||||||
regs->ret += state.instr_len;
|
regs->ret += state.instr_len;
|
||||||
|
|
||||||
|
/* handle zero-overhead-loop */
|
||||||
|
if ((regs->ret == regs->lp_end) && (regs->lp_count)) {
|
||||||
|
regs->ret = regs->lp_start;
|
||||||
|
regs->lp_count--;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@ -2214,8 +2214,7 @@ config NEON
|
|||||||
|
|
||||||
config KERNEL_MODE_NEON
|
config KERNEL_MODE_NEON
|
||||||
bool "Support for NEON in kernel mode"
|
bool "Support for NEON in kernel mode"
|
||||||
default n
|
depends on NEON && AEABI
|
||||||
depends on NEON
|
|
||||||
help
|
help
|
||||||
Say Y to include support for NEON in kernel mode.
|
Say Y to include support for NEON in kernel mode.
|
||||||
|
|
||||||
|
|||||||
@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
|
|||||||
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
||||||
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
||||||
|
|
||||||
|
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||||
|
|
||||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||||
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
||||||
bcm28155-ap.dtb
|
bcm28155-ap.dtb
|
||||||
@ -183,6 +185,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
|||||||
am335x-evm.dtb \
|
am335x-evm.dtb \
|
||||||
am335x-evmsk.dtb \
|
am335x-evmsk.dtb \
|
||||||
am335x-bone.dtb \
|
am335x-bone.dtb \
|
||||||
|
am335x-boneblack.dtb \
|
||||||
am3517-evm.dtb \
|
am3517-evm.dtb \
|
||||||
am3517_mt_ventoux.dtb \
|
am3517_mt_ventoux.dtb \
|
||||||
am43x-epos-evm.dtb
|
am43x-epos-evm.dtb
|
||||||
|
|||||||
262
arch/arm/boot/dts/am335x-bone-common.dtsi
Normal file
262
arch/arm/boot/dts/am335x-bone-common.dtsi
Normal file
@ -0,0 +1,262 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "TI AM335x BeagleBone";
|
||||||
|
compatible = "ti,am335x-bone", "ti,am33xx";
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
cpu@0 {
|
||||||
|
cpu0-supply = <&dcdc2_reg>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||||
|
};
|
||||||
|
|
||||||
|
am33xx_pinmux: pinmux@44e10800 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&clkout2_pin>;
|
||||||
|
|
||||||
|
user_leds_s0: user_leds_s0 {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
||||||
|
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
||||||
|
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
|
||||||
|
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c0_pins: pinmux_i2c0_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||||
|
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart0_pins: pinmux_uart0_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||||
|
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
clkout2_pin: pinmux_clkout2_pin {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpsw_default: cpsw_default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* Slave 1 */
|
||||||
|
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
||||||
|
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
||||||
|
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
||||||
|
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
||||||
|
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
||||||
|
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
||||||
|
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
||||||
|
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
||||||
|
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
||||||
|
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
||||||
|
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
||||||
|
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
||||||
|
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpsw_sleep: cpsw_sleep {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* Slave 1 reset value */
|
||||||
|
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
davinci_mdio_default: davinci_mdio_default {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* MDIO */
|
||||||
|
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||||
|
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* MDIO reset value */
|
||||||
|
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ocp {
|
||||||
|
uart0: serial@44e09000 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&uart0_pins>;
|
||||||
|
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
musb: usb@47400000 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
control@44e10000 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb-phy@47401300 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb-phy@47401b00 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@47401000 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
usb@47401800 {
|
||||||
|
status = "okay";
|
||||||
|
dr_mode = "host";
|
||||||
|
};
|
||||||
|
|
||||||
|
dma-controller@07402000 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c0: i2c@44e0b000 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c0_pins>;
|
||||||
|
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
tps: tps@24 {
|
||||||
|
reg = <0x24>;
|
||||||
|
};
|
||||||
|
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&user_leds_s0>;
|
||||||
|
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
|
||||||
|
led@2 {
|
||||||
|
label = "beaglebone:green:heartbeat";
|
||||||
|
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||||
|
linux,default-trigger = "heartbeat";
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
|
||||||
|
led@3 {
|
||||||
|
label = "beaglebone:green:mmc0";
|
||||||
|
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||||
|
linux,default-trigger = "mmc0";
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
|
||||||
|
led@4 {
|
||||||
|
label = "beaglebone:green:usr2";
|
||||||
|
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
|
||||||
|
led@5 {
|
||||||
|
label = "beaglebone:green:usr3";
|
||||||
|
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/include/ "tps65217.dtsi"
|
||||||
|
|
||||||
|
&tps {
|
||||||
|
regulators {
|
||||||
|
dcdc1_reg: regulator@0 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
dcdc2_reg: regulator@1 {
|
||||||
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||||
|
regulator-name = "vdd_mpu";
|
||||||
|
regulator-min-microvolt = <925000>;
|
||||||
|
regulator-max-microvolt = <1325000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
dcdc3_reg: regulator@2 {
|
||||||
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||||
|
regulator-name = "vdd_core";
|
||||||
|
regulator-min-microvolt = <925000>;
|
||||||
|
regulator-max-microvolt = <1150000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
ldo1_reg: regulator@3 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
ldo2_reg: regulator@4 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
ldo3_reg: regulator@5 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
ldo4_reg: regulator@6 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_emac0 {
|
||||||
|
phy_id = <&davinci_mdio>, <0>;
|
||||||
|
phy-mode = "mii";
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_emac1 {
|
||||||
|
phy_id = <&davinci_mdio>, <1>;
|
||||||
|
phy-mode = "mii";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mac {
|
||||||
|
pinctrl-names = "default", "sleep";
|
||||||
|
pinctrl-0 = <&cpsw_default>;
|
||||||
|
pinctrl-1 = <&cpsw_sleep>;
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
&davinci_mdio {
|
||||||
|
pinctrl-names = "default", "sleep";
|
||||||
|
pinctrl-0 = <&davinci_mdio_default>;
|
||||||
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||||
|
};
|
||||||
@ -8,258 +8,4 @@
|
|||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
#include "am33xx.dtsi"
|
#include "am33xx.dtsi"
|
||||||
|
#include "am335x-bone-common.dtsi"
|
||||||
/ {
|
|
||||||
model = "TI AM335x BeagleBone";
|
|
||||||
compatible = "ti,am335x-bone", "ti,am33xx";
|
|
||||||
|
|
||||||
cpus {
|
|
||||||
cpu@0 {
|
|
||||||
cpu0-supply = <&dcdc2_reg>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
memory {
|
|
||||||
device_type = "memory";
|
|
||||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
|
||||||
};
|
|
||||||
|
|
||||||
am33xx_pinmux: pinmux@44e10800 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&clkout2_pin>;
|
|
||||||
|
|
||||||
user_leds_s0: user_leds_s0 {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
|
|
||||||
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
|
|
||||||
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
|
|
||||||
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0_pins: pinmux_i2c0_pins {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
|
||||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart0_pins: pinmux_uart0_pins {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
|
||||||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
clkout2_pin: pinmux_clkout2_pin {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
cpsw_default: cpsw_default {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
/* Slave 1 */
|
|
||||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
|
||||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
|
||||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
|
||||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
|
||||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
|
||||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
|
||||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
|
||||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
|
||||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
|
||||||
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
|
||||||
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
|
||||||
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
|
||||||
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
cpsw_sleep: cpsw_sleep {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
/* Slave 1 reset value */
|
|
||||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
davinci_mdio_default: davinci_mdio_default {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
/* MDIO */
|
|
||||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
|
||||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
|
|
||||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
|
||||||
pinctrl-single,pins = <
|
|
||||||
/* MDIO reset value */
|
|
||||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
||||||
>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
ocp {
|
|
||||||
uart0: serial@44e09000 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&uart0_pins>;
|
|
||||||
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
musb: usb@47400000 {
|
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
control@44e10000 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
usb-phy@47401300 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
usb-phy@47401b00 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
usb@47401000 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
usb@47401800 {
|
|
||||||
status = "okay";
|
|
||||||
dr_mode = "host";
|
|
||||||
};
|
|
||||||
|
|
||||||
dma-controller@07402000 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0: i2c@44e0b000 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&i2c0_pins>;
|
|
||||||
|
|
||||||
status = "okay";
|
|
||||||
clock-frequency = <400000>;
|
|
||||||
|
|
||||||
tps: tps@24 {
|
|
||||||
reg = <0x24>;
|
|
||||||
};
|
|
||||||
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
leds {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&user_leds_s0>;
|
|
||||||
|
|
||||||
compatible = "gpio-leds";
|
|
||||||
|
|
||||||
led@2 {
|
|
||||||
label = "beaglebone:green:heartbeat";
|
|
||||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
|
||||||
linux,default-trigger = "heartbeat";
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
led@3 {
|
|
||||||
label = "beaglebone:green:mmc0";
|
|
||||||
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
|
||||||
linux,default-trigger = "mmc0";
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
led@4 {
|
|
||||||
label = "beaglebone:green:usr2";
|
|
||||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
|
|
||||||
led@5 {
|
|
||||||
label = "beaglebone:green:usr3";
|
|
||||||
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
|
||||||
default-state = "off";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
/include/ "tps65217.dtsi"
|
|
||||||
|
|
||||||
&tps {
|
|
||||||
regulators {
|
|
||||||
dcdc1_reg: regulator@0 {
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
dcdc2_reg: regulator@1 {
|
|
||||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
|
||||||
regulator-name = "vdd_mpu";
|
|
||||||
regulator-min-microvolt = <925000>;
|
|
||||||
regulator-max-microvolt = <1325000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
dcdc3_reg: regulator@2 {
|
|
||||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
|
||||||
regulator-name = "vdd_core";
|
|
||||||
regulator-min-microvolt = <925000>;
|
|
||||||
regulator-max-microvolt = <1150000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
ldo1_reg: regulator@3 {
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
ldo2_reg: regulator@4 {
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
ldo3_reg: regulator@5 {
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
ldo4_reg: regulator@6 {
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&cpsw_emac0 {
|
|
||||||
phy_id = <&davinci_mdio>, <0>;
|
|
||||||
phy-mode = "mii";
|
|
||||||
};
|
|
||||||
|
|
||||||
&cpsw_emac1 {
|
|
||||||
phy_id = <&davinci_mdio>, <1>;
|
|
||||||
phy-mode = "mii";
|
|
||||||
};
|
|
||||||
|
|
||||||
&mac {
|
|
||||||
pinctrl-names = "default", "sleep";
|
|
||||||
pinctrl-0 = <&cpsw_default>;
|
|
||||||
pinctrl-1 = <&cpsw_sleep>;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
&davinci_mdio {
|
|
||||||
pinctrl-names = "default", "sleep";
|
|
||||||
pinctrl-0 = <&davinci_mdio_default>;
|
|
||||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
||||||
};
|
|
||||||
|
|||||||
17
arch/arm/boot/dts/am335x-boneblack.dts
Normal file
17
arch/arm/boot/dts/am335x-boneblack.dts
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*/
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "am33xx.dtsi"
|
||||||
|
#include "am335x-bone-common.dtsi"
|
||||||
|
|
||||||
|
&ldo3_reg {
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
@ -27,6 +27,25 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
soc {
|
soc {
|
||||||
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||||
|
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||||
|
|
||||||
|
pcie-controller {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* Connected to Marvell SATA controller */
|
||||||
|
pcie@1,0 {
|
||||||
|
/* Port 0, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Connected to FL1009 USB 3.0 controller */
|
||||||
|
pcie@2,0 {
|
||||||
|
/* Port 1, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
internal-regs {
|
internal-regs {
|
||||||
serial@12000 {
|
serial@12000 {
|
||||||
clock-frequency = <200000000>;
|
clock-frequency = <200000000>;
|
||||||
@ -57,6 +76,11 @@
|
|||||||
marvell,pins = "mpp56";
|
marvell,pins = "mpp56";
|
||||||
marvell,function = "gpio";
|
marvell,function = "gpio";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
poweroff: poweroff {
|
||||||
|
marvell,pins = "mpp8";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
mdio {
|
mdio {
|
||||||
@ -89,22 +113,6 @@
|
|||||||
pwm_polarity = <0>;
|
pwm_polarity = <0>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pcie-controller {
|
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
/* Connected to Marvell SATA controller */
|
|
||||||
pcie@1,0 {
|
|
||||||
/* Port 0, Lane 0 */
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Connected to FL1009 USB 3.0 controller */
|
|
||||||
pcie@2,0 {
|
|
||||||
/* Port 1, Lane 0 */
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -160,7 +168,7 @@
|
|||||||
button@1 {
|
button@1 {
|
||||||
label = "Power Button";
|
label = "Power Button";
|
||||||
linux,code = <116>; /* KEY_POWER */
|
linux,code = <116>; /* KEY_POWER */
|
||||||
gpios = <&gpio1 30 1>;
|
gpios = <&gpio1 30 0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
button@2 {
|
button@2 {
|
||||||
@ -176,4 +184,11 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
gpio_poweroff {
|
||||||
|
compatible = "gpio-poweroff";
|
||||||
|
pinctrl-0 = <&poweroff>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
gpios = <&gpio0 8 1>;
|
||||||
|
};
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|||||||
@ -70,6 +70,8 @@
|
|||||||
|
|
||||||
timer@20300 {
|
timer@20300 {
|
||||||
compatible = "marvell,armada-xp-timer";
|
compatible = "marvell,armada-xp-timer";
|
||||||
|
clocks = <&coreclk 2>, <&refclk>;
|
||||||
|
clock-names = "nbclk", "fixed";
|
||||||
};
|
};
|
||||||
|
|
||||||
coreclk: mvebu-sar@18230 {
|
coreclk: mvebu-sar@18230 {
|
||||||
@ -169,4 +171,13 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
clocks {
|
||||||
|
/* 25 MHz reference crystal */
|
||||||
|
refclk: oscillator {
|
||||||
|
compatible = "fixed-clock";
|
||||||
|
#clock-cells = <0>;
|
||||||
|
clock-frequency = <25000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|||||||
@ -190,12 +190,12 @@
|
|||||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||||
};
|
};
|
||||||
|
|
||||||
pinctrl_uart2_rts: uart2_rts-0 {
|
pinctrl_usart2_rts: usart2_rts-0 {
|
||||||
atmel,pins =
|
atmel,pins =
|
||||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||||
};
|
};
|
||||||
|
|
||||||
pinctrl_uart2_cts: uart2_cts-0 {
|
pinctrl_usart2_cts: usart2_cts-0 {
|
||||||
atmel,pins =
|
atmel,pins =
|
||||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||||
};
|
};
|
||||||
@ -556,6 +556,7 @@
|
|||||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||||
dma-names = "rxtx";
|
dma-names = "rxtx";
|
||||||
|
pinctrl-names = "default";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
@ -567,6 +568,7 @@
|
|||||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||||
dma-names = "rxtx";
|
dma-names = "rxtx";
|
||||||
|
pinctrl-names = "default";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|||||||
@ -181,6 +181,8 @@
|
|||||||
interrupts = <17>;
|
interrupts = <17>;
|
||||||
fifosize = <128>;
|
fifosize = <128>;
|
||||||
clocks = <&clks 13>;
|
clocks = <&clks 13>;
|
||||||
|
sirf,uart-dma-rx-channel = <21>;
|
||||||
|
sirf,uart-dma-tx-channel = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@b0060000 {
|
uart1: uart@b0060000 {
|
||||||
@ -199,6 +201,8 @@
|
|||||||
interrupts = <19>;
|
interrupts = <19>;
|
||||||
fifosize = <128>;
|
fifosize = <128>;
|
||||||
clocks = <&clks 15>;
|
clocks = <&clks 15>;
|
||||||
|
sirf,uart-dma-rx-channel = <6>;
|
||||||
|
sirf,uart-dma-tx-channel = <7>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp0: usp@b0080000 {
|
usp0: usp@b0080000 {
|
||||||
@ -206,7 +210,10 @@
|
|||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0080000 0x10000>;
|
reg = <0xb0080000 0x10000>;
|
||||||
interrupts = <20>;
|
interrupts = <20>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 28>;
|
clocks = <&clks 28>;
|
||||||
|
sirf,usp-dma-rx-channel = <17>;
|
||||||
|
sirf,usp-dma-tx-channel = <18>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp1: usp@b0090000 {
|
usp1: usp@b0090000 {
|
||||||
@ -214,7 +221,10 @@
|
|||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0090000 0x10000>;
|
reg = <0xb0090000 0x10000>;
|
||||||
interrupts = <21>;
|
interrupts = <21>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 29>;
|
clocks = <&clks 29>;
|
||||||
|
sirf,usp-dma-rx-channel = <14>;
|
||||||
|
sirf,usp-dma-tx-channel = <15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac0: dma-controller@b00b0000 {
|
dmac0: dma-controller@b00b0000 {
|
||||||
@ -237,6 +247,8 @@
|
|||||||
compatible = "sirf,prima2-vip";
|
compatible = "sirf,prima2-vip";
|
||||||
reg = <0xb00C0000 0x10000>;
|
reg = <0xb00C0000 0x10000>;
|
||||||
clocks = <&clks 31>;
|
clocks = <&clks 31>;
|
||||||
|
interrupts = <14>;
|
||||||
|
sirf,vip-dma-rx-channel = <16>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0: spi@b00d0000 {
|
spi0: spi@b00d0000 {
|
||||||
|
|||||||
@ -187,7 +187,7 @@
|
|||||||
compatible = "fsl,imx27-cspi";
|
compatible = "fsl,imx27-cspi";
|
||||||
reg = <0x1000e000 0x1000>;
|
reg = <0x1000e000 0x1000>;
|
||||||
interrupts = <16>;
|
interrupts = <16>;
|
||||||
clocks = <&clks 53>, <&clks 53>;
|
clocks = <&clks 53>, <&clks 60>;
|
||||||
clock-names = "ipg", "per";
|
clock-names = "ipg", "per";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
@ -198,7 +198,7 @@
|
|||||||
compatible = "fsl,imx27-cspi";
|
compatible = "fsl,imx27-cspi";
|
||||||
reg = <0x1000f000 0x1000>;
|
reg = <0x1000f000 0x1000>;
|
||||||
interrupts = <15>;
|
interrupts = <15>;
|
||||||
clocks = <&clks 52>, <&clks 52>;
|
clocks = <&clks 52>, <&clks 60>;
|
||||||
clock-names = "ipg", "per";
|
clock-names = "ipg", "per";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
@ -309,7 +309,7 @@
|
|||||||
compatible = "fsl,imx27-cspi";
|
compatible = "fsl,imx27-cspi";
|
||||||
reg = <0x10017000 0x1000>;
|
reg = <0x10017000 0x1000>;
|
||||||
interrupts = <6>;
|
interrupts = <6>;
|
||||||
clocks = <&clks 51>, <&clks 51>;
|
clocks = <&clks 51>, <&clks 60>;
|
||||||
clock-names = "ipg", "per";
|
clock-names = "ipg", "per";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|||||||
@ -474,7 +474,7 @@
|
|||||||
compatible = "fsl,imx51-pata", "fsl,imx27-pata";
|
compatible = "fsl,imx51-pata", "fsl,imx27-pata";
|
||||||
reg = <0x83fe0000 0x4000>;
|
reg = <0x83fe0000 0x4000>;
|
||||||
interrupts = <70>;
|
interrupts = <70>;
|
||||||
clocks = <&clks 161>;
|
clocks = <&clks 172>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -207,8 +207,8 @@
|
|||||||
#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1
|
#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1
|
||||||
#define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1
|
#define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1
|
||||||
#define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0
|
#define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0
|
||||||
#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c4 0x3dc 0x000 0x4 0x0
|
#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0
|
||||||
#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c4 0x3dc 0x924 0x4 0x1
|
#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1
|
||||||
#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0
|
#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0
|
||||||
#define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0
|
#define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0
|
||||||
#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0
|
#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0
|
||||||
|
|||||||
@ -13,6 +13,7 @@
|
|||||||
cpu@0 {
|
cpu@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
compatible = "marvell,feroceon";
|
compatible = "marvell,feroceon";
|
||||||
|
reg = <0>;
|
||||||
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
||||||
clock-names = "cpu_clk", "ddrclk", "powersave";
|
clock-names = "cpu_clk", "ddrclk", "powersave";
|
||||||
};
|
};
|
||||||
@ -167,7 +168,7 @@
|
|||||||
xor@60900 {
|
xor@60900 {
|
||||||
compatible = "marvell,orion-xor";
|
compatible = "marvell,orion-xor";
|
||||||
reg = <0x60900 0x100
|
reg = <0x60900 0x100
|
||||||
0xd0B00 0x100>;
|
0x60B00 0x100>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
clocks = <&gate_clk 16>;
|
clocks = <&gate_clk 16>;
|
||||||
|
|
||||||
|
|||||||
@ -11,7 +11,7 @@
|
|||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "TI OMAP3 BeagleBoard xM";
|
model = "TI OMAP3 BeagleBoard xM";
|
||||||
compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3";
|
compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3";
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
cpu@0 {
|
cpu@0 {
|
||||||
|
|||||||
@ -48,6 +48,15 @@
|
|||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
|
||||||
|
0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
|
||||||
|
0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
|
||||||
|
0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
mmc1_pins: pinmux_mmc1_pins {
|
mmc1_pins: pinmux_mmc1_pins {
|
||||||
pinctrl-single,pins = <
|
pinctrl-single,pins = <
|
||||||
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||||
@ -93,6 +102,11 @@
|
|||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&mcbsp2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&mcbsp2_pins>;
|
||||||
|
};
|
||||||
|
|
||||||
&mmc1 {
|
&mmc1 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&mmc1_pins>;
|
pinctrl-0 = <&mmc1_pins>;
|
||||||
|
|||||||
@ -107,6 +107,19 @@
|
|||||||
*/
|
*/
|
||||||
clock-frequency = <19200000>;
|
clock-frequency = <19200000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* regulator for wl12xx on sdio5 */
|
||||||
|
wl12xx_vmmc: wl12xx_vmmc {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&wl12xx_gpio>;
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vwl1271";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
gpio = <&gpio2 11 0>;
|
||||||
|
startup-delay-us = <70000>;
|
||||||
|
enable-active-high;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&omap4_pmx_wkup {
|
&omap4_pmx_wkup {
|
||||||
@ -235,6 +248,33 @@
|
|||||||
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
|
||||||
|
* REVISIT: Are the pull-ups needed for GPIO 48 and 49?
|
||||||
|
*/
|
||||||
|
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||||
|
0x2c (PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
|
||||||
|
0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */
|
||||||
|
0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* wl12xx GPIO inputs and SDIO pins */
|
||||||
|
wl12xx_pins: pinmux_wl12xx_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
|
||||||
|
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||||
|
0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
|
||||||
|
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||||
|
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||||
|
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||||
|
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||||
|
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
@ -314,8 +354,12 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
&mmc5 {
|
&mmc5 {
|
||||||
ti,non-removable;
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&wl12xx_pins>;
|
||||||
|
vmmc-supply = <&wl12xx_vmmc>;
|
||||||
|
non-removable;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
|
cap-power-off-card;
|
||||||
};
|
};
|
||||||
|
|
||||||
&emif1 {
|
&emif1 {
|
||||||
|
|||||||
@ -140,6 +140,19 @@
|
|||||||
"DMic", "Digital Mic",
|
"DMic", "Digital Mic",
|
||||||
"Digital Mic", "Digital Mic1 Bias";
|
"Digital Mic", "Digital Mic1 Bias";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* regulator for wl12xx on sdio5 */
|
||||||
|
wl12xx_vmmc: wl12xx_vmmc {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&wl12xx_gpio>;
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vwl1271";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
gpio = <&gpio2 22 0>;
|
||||||
|
startup-delay-us = <70000>;
|
||||||
|
enable-active-high;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&omap4_pmx_wkup {
|
&omap4_pmx_wkup {
|
||||||
@ -295,6 +308,26 @@
|
|||||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* wl12xx GPIO output for WLAN_EN */
|
||||||
|
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* wl12xx GPIO inputs and SDIO pins */
|
||||||
|
wl12xx_pins: pinmux_wl12xx_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||||
|
0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */
|
||||||
|
0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */
|
||||||
|
0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */
|
||||||
|
0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */
|
||||||
|
0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */
|
||||||
|
0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
@ -420,8 +453,12 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
&mmc5 {
|
&mmc5 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&wl12xx_pins>;
|
||||||
|
vmmc-supply = <&wl12xx_vmmc>;
|
||||||
|
non-removable;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
ti,non-removable;
|
cap-power-off-card;
|
||||||
};
|
};
|
||||||
|
|
||||||
&emif1 {
|
&emif1 {
|
||||||
|
|||||||
@ -637,7 +637,7 @@
|
|||||||
omap_dwc3@4a020000 {
|
omap_dwc3@4a020000 {
|
||||||
compatible = "ti,dwc3";
|
compatible = "ti,dwc3";
|
||||||
ti,hwmods = "usb_otg_ss";
|
ti,hwmods = "usb_otg_ss";
|
||||||
reg = <0x4a020000 0x1000>;
|
reg = <0x4a020000 0x10000>;
|
||||||
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
@ -645,17 +645,18 @@
|
|||||||
ranges;
|
ranges;
|
||||||
dwc3@4a030000 {
|
dwc3@4a030000 {
|
||||||
compatible = "snps,dwc3";
|
compatible = "snps,dwc3";
|
||||||
reg = <0x4a030000 0x1000>;
|
reg = <0x4a030000 0x10000>;
|
||||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
||||||
tx-fifo-resize;
|
tx-fifo-resize;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ocp2scp {
|
ocp2scp@4a080000 {
|
||||||
compatible = "ti,omap-ocp2scp";
|
compatible = "ti,omap-ocp2scp";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
reg = <0x4a080000 0x20>;
|
||||||
ranges;
|
ranges;
|
||||||
ti,hwmods = "ocp2scp1";
|
ti,hwmods = "ocp2scp1";
|
||||||
usb2_phy: usb2phy@4a084000 {
|
usb2_phy: usb2phy@4a084000 {
|
||||||
|
|||||||
@ -171,7 +171,8 @@
|
|||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges = <0xb0000000 0xb0000000 0x180000>;
|
ranges = <0xb0000000 0xb0000000 0x180000>,
|
||||||
|
<0x56000000 0x56000000 0x1b00000>;
|
||||||
|
|
||||||
timer@b0020000 {
|
timer@b0020000 {
|
||||||
compatible = "sirf,prima2-tick";
|
compatible = "sirf,prima2-tick";
|
||||||
@ -196,25 +197,32 @@
|
|||||||
uart0: uart@b0050000 {
|
uart0: uart@b0050000 {
|
||||||
cell-index = <0>;
|
cell-index = <0>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0050000 0x10000>;
|
reg = <0xb0050000 0x1000>;
|
||||||
interrupts = <17>;
|
interrupts = <17>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 13>;
|
clocks = <&clks 13>;
|
||||||
|
sirf,uart-dma-rx-channel = <21>;
|
||||||
|
sirf,uart-dma-tx-channel = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@b0060000 {
|
uart1: uart@b0060000 {
|
||||||
cell-index = <1>;
|
cell-index = <1>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0060000 0x10000>;
|
reg = <0xb0060000 0x1000>;
|
||||||
interrupts = <18>;
|
interrupts = <18>;
|
||||||
|
fifosize = <32>;
|
||||||
clocks = <&clks 14>;
|
clocks = <&clks 14>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@b0070000 {
|
uart2: uart@b0070000 {
|
||||||
cell-index = <2>;
|
cell-index = <2>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0070000 0x10000>;
|
reg = <0xb0070000 0x1000>;
|
||||||
interrupts = <19>;
|
interrupts = <19>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 15>;
|
clocks = <&clks 15>;
|
||||||
|
sirf,uart-dma-rx-channel = <6>;
|
||||||
|
sirf,uart-dma-tx-channel = <7>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp0: usp@b0080000 {
|
usp0: usp@b0080000 {
|
||||||
@ -222,7 +230,10 @@
|
|||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0080000 0x10000>;
|
reg = <0xb0080000 0x10000>;
|
||||||
interrupts = <20>;
|
interrupts = <20>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 28>;
|
clocks = <&clks 28>;
|
||||||
|
sirf,usp-dma-rx-channel = <17>;
|
||||||
|
sirf,usp-dma-tx-channel = <18>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp1: usp@b0090000 {
|
usp1: usp@b0090000 {
|
||||||
@ -230,7 +241,10 @@
|
|||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0090000 0x10000>;
|
reg = <0xb0090000 0x10000>;
|
||||||
interrupts = <21>;
|
interrupts = <21>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 29>;
|
clocks = <&clks 29>;
|
||||||
|
sirf,usp-dma-rx-channel = <14>;
|
||||||
|
sirf,usp-dma-tx-channel = <15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp2: usp@b00a0000 {
|
usp2: usp@b00a0000 {
|
||||||
@ -238,7 +252,10 @@
|
|||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb00a0000 0x10000>;
|
reg = <0xb00a0000 0x10000>;
|
||||||
interrupts = <22>;
|
interrupts = <22>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 30>;
|
clocks = <&clks 30>;
|
||||||
|
sirf,usp-dma-rx-channel = <10>;
|
||||||
|
sirf,usp-dma-tx-channel = <11>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac0: dma-controller@b00b0000 {
|
dmac0: dma-controller@b00b0000 {
|
||||||
@ -261,6 +278,8 @@
|
|||||||
compatible = "sirf,prima2-vip";
|
compatible = "sirf,prima2-vip";
|
||||||
reg = <0xb00C0000 0x10000>;
|
reg = <0xb00C0000 0x10000>;
|
||||||
clocks = <&clks 31>;
|
clocks = <&clks 31>;
|
||||||
|
interrupts = <14>;
|
||||||
|
sirf,vip-dma-rx-channel = <16>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0: spi@b00d0000 {
|
spi0: spi@b00d0000 {
|
||||||
|
|||||||
@ -193,7 +193,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi0: sdhi@ee100000 {
|
sdhi0: sdhi@ee100000 {
|
||||||
compatible = "renesas,r8a73a4-sdhi";
|
compatible = "renesas,sdhi-r8a73a4";
|
||||||
reg = <0 0xee100000 0 0x100>;
|
reg = <0 0xee100000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 165 4>;
|
interrupts = <0 165 4>;
|
||||||
@ -202,7 +202,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi1: sdhi@ee120000 {
|
sdhi1: sdhi@ee120000 {
|
||||||
compatible = "renesas,r8a73a4-sdhi";
|
compatible = "renesas,sdhi-r8a73a4";
|
||||||
reg = <0 0xee120000 0 0x100>;
|
reg = <0 0xee120000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 166 4>;
|
interrupts = <0 166 4>;
|
||||||
@ -211,7 +211,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi2: sdhi@ee140000 {
|
sdhi2: sdhi@ee140000 {
|
||||||
compatible = "renesas,r8a73a4-sdhi";
|
compatible = "renesas,sdhi-r8a73a4";
|
||||||
reg = <0 0xee140000 0 0x100>;
|
reg = <0 0xee140000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 167 4>;
|
interrupts = <0 167 4>;
|
||||||
|
|||||||
@ -96,6 +96,5 @@
|
|||||||
pfc: pfc@fffc0000 {
|
pfc: pfc@fffc0000 {
|
||||||
compatible = "renesas,pfc-r8a7778";
|
compatible = "renesas,pfc-r8a7778";
|
||||||
reg = <0xfffc000 0x118>;
|
reg = <0xfffc000 0x118>;
|
||||||
#gpio-range-cells = <3>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|||||||
@ -188,7 +188,6 @@
|
|||||||
pfc: pfc@fffc0000 {
|
pfc: pfc@fffc0000 {
|
||||||
compatible = "renesas,pfc-r8a7779";
|
compatible = "renesas,pfc-r8a7779";
|
||||||
reg = <0xfffc0000 0x23c>;
|
reg = <0xfffc0000 0x23c>;
|
||||||
#gpio-range-cells = <3>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
thermal@ffc48000 {
|
thermal@ffc48000 {
|
||||||
|
|||||||
@ -148,11 +148,10 @@
|
|||||||
pfc: pfc@e6060000 {
|
pfc: pfc@e6060000 {
|
||||||
compatible = "renesas,pfc-r8a7790";
|
compatible = "renesas,pfc-r8a7790";
|
||||||
reg = <0 0xe6060000 0 0x250>;
|
reg = <0 0xe6060000 0 0x250>;
|
||||||
#gpio-range-cells = <3>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
sdhi0: sdhi@ee100000 {
|
sdhi0: sdhi@ee100000 {
|
||||||
compatible = "renesas,r8a7790-sdhi";
|
compatible = "renesas,sdhi-r8a7790";
|
||||||
reg = <0 0xee100000 0 0x100>;
|
reg = <0 0xee100000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 165 4>;
|
interrupts = <0 165 4>;
|
||||||
@ -161,7 +160,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi1: sdhi@ee120000 {
|
sdhi1: sdhi@ee120000 {
|
||||||
compatible = "renesas,r8a7790-sdhi";
|
compatible = "renesas,sdhi-r8a7790";
|
||||||
reg = <0 0xee120000 0 0x100>;
|
reg = <0 0xee120000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 166 4>;
|
interrupts = <0 166 4>;
|
||||||
@ -170,7 +169,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi2: sdhi@ee140000 {
|
sdhi2: sdhi@ee140000 {
|
||||||
compatible = "renesas,r8a7790-sdhi";
|
compatible = "renesas,sdhi-r8a7790";
|
||||||
reg = <0 0xee140000 0 0x100>;
|
reg = <0 0xee140000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 167 4>;
|
interrupts = <0 167 4>;
|
||||||
@ -179,7 +178,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi3: sdhi@ee160000 {
|
sdhi3: sdhi@ee160000 {
|
||||||
compatible = "renesas,r8a7790-sdhi";
|
compatible = "renesas,sdhi-r8a7790";
|
||||||
reg = <0 0xee160000 0 0x100>;
|
reg = <0 0xee160000 0 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 168 4>;
|
interrupts = <0 168 4>;
|
||||||
|
|||||||
@ -196,7 +196,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi0: sdhi@ee100000 {
|
sdhi0: sdhi@ee100000 {
|
||||||
compatible = "renesas,r8a7740-sdhi";
|
compatible = "renesas,sdhi-r8a7740";
|
||||||
reg = <0xee100000 0x100>;
|
reg = <0xee100000 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 83 4
|
interrupts = <0 83 4
|
||||||
@ -208,7 +208,7 @@
|
|||||||
|
|
||||||
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
|
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
|
||||||
sdhi1: sdhi@ee120000 {
|
sdhi1: sdhi@ee120000 {
|
||||||
compatible = "renesas,r8a7740-sdhi";
|
compatible = "renesas,sdhi-r8a7740";
|
||||||
reg = <0xee120000 0x100>;
|
reg = <0xee120000 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 88 4
|
interrupts = <0 88 4
|
||||||
@ -219,7 +219,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
sdhi2: sdhi@ee140000 {
|
sdhi2: sdhi@ee140000 {
|
||||||
compatible = "renesas,r8a7740-sdhi";
|
compatible = "renesas,sdhi-r8a7740";
|
||||||
reg = <0xee140000 0x100>;
|
reg = <0xee140000 0x100>;
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
interrupts = <0 104 4
|
interrupts = <0 104 4
|
||||||
|
|||||||
@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = {
|
|||||||
.ccnt = 1,
|
.ccnt = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const struct of_device_id edma_of_ids[] = {
|
||||||
|
{ .compatible = "ti,edma3", },
|
||||||
|
{}
|
||||||
|
};
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
|
static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
|
||||||
@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
|
|||||||
static int prepare_unused_channel_list(struct device *dev, void *data)
|
static int prepare_unused_channel_list(struct device *dev, void *data)
|
||||||
{
|
{
|
||||||
struct platform_device *pdev = to_platform_device(dev);
|
struct platform_device *pdev = to_platform_device(dev);
|
||||||
int i, ctlr;
|
int i, count, ctlr;
|
||||||
|
struct of_phandle_args dma_spec;
|
||||||
|
|
||||||
|
if (dev->of_node) {
|
||||||
|
count = of_property_count_strings(dev->of_node, "dma-names");
|
||||||
|
if (count < 0)
|
||||||
|
return 0;
|
||||||
|
for (i = 0; i < count; i++) {
|
||||||
|
if (of_parse_phandle_with_args(dev->of_node, "dmas",
|
||||||
|
"#dma-cells", i,
|
||||||
|
&dma_spec))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
if (!of_match_node(edma_of_ids, dma_spec.np)) {
|
||||||
|
of_node_put(dma_spec.np);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]),
|
||||||
|
edma_cc[0]->edma_unused);
|
||||||
|
of_node_put(dma_spec.np);
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* For non-OF case */
|
||||||
for (i = 0; i < pdev->num_resources; i++) {
|
for (i = 0; i < pdev->num_resources; i++) {
|
||||||
if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
|
if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
|
||||||
(int)pdev->resource[i].start >= 0) {
|
(int)pdev->resource[i].start >= 0) {
|
||||||
ctlr = EDMA_CTLR(pdev->resource[i].start);
|
ctlr = EDMA_CTLR(pdev->resource[i].start);
|
||||||
clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
|
clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
|
||||||
edma_cc[ctlr]->edma_unused);
|
edma_cc[ctlr]->edma_unused);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct of_device_id edma_of_ids[] = {
|
|
||||||
{ .compatible = "ti,edma3", },
|
|
||||||
{}
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_driver edma_driver = {
|
static struct platform_driver edma_driver = {
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "edma",
|
.name = "edma",
|
||||||
|
|||||||
@ -36,6 +36,7 @@ CONFIG_ARCH_TEGRA_114_SOC=y
|
|||||||
CONFIG_TEGRA_PCI=y
|
CONFIG_TEGRA_PCI=y
|
||||||
CONFIG_TEGRA_EMC_SCALING_ENABLE=y
|
CONFIG_TEGRA_EMC_SCALING_ENABLE=y
|
||||||
CONFIG_ARCH_U8500=y
|
CONFIG_ARCH_U8500=y
|
||||||
|
CONFIG_MACH_HREFV60=y
|
||||||
CONFIG_MACH_SNOWBALL=y
|
CONFIG_MACH_SNOWBALL=y
|
||||||
CONFIG_MACH_UX500_DT=y
|
CONFIG_MACH_UX500_DT=y
|
||||||
CONFIG_ARCH_VEXPRESS=y
|
CONFIG_ARCH_VEXPRESS=y
|
||||||
@ -46,6 +47,7 @@ CONFIG_ARCH_ZYNQ=y
|
|||||||
CONFIG_SMP=y
|
CONFIG_SMP=y
|
||||||
CONFIG_HIGHPTE=y
|
CONFIG_HIGHPTE=y
|
||||||
CONFIG_ARM_APPENDED_DTB=y
|
CONFIG_ARM_APPENDED_DTB=y
|
||||||
|
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||||
CONFIG_NET=y
|
CONFIG_NET=y
|
||||||
CONFIG_UNIX=y
|
CONFIG_UNIX=y
|
||||||
CONFIG_INET=y
|
CONFIG_INET=y
|
||||||
@ -133,6 +135,7 @@ CONFIG_MMC=y
|
|||||||
CONFIG_MMC_ARMMMCI=y
|
CONFIG_MMC_ARMMMCI=y
|
||||||
CONFIG_MMC_SDHCI=y
|
CONFIG_MMC_SDHCI=y
|
||||||
CONFIG_MMC_SDHCI_PLTFM=y
|
CONFIG_MMC_SDHCI_PLTFM=y
|
||||||
|
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||||
CONFIG_MMC_SDHCI_TEGRA=y
|
CONFIG_MMC_SDHCI_TEGRA=y
|
||||||
CONFIG_MMC_SDHCI_SPEAR=y
|
CONFIG_MMC_SDHCI_SPEAR=y
|
||||||
CONFIG_MMC_OMAP=y
|
CONFIG_MMC_OMAP=y
|
||||||
|
|||||||
@ -148,7 +148,7 @@ AES_Te:
|
|||||||
@ const AES_KEY *key) {
|
@ const AES_KEY *key) {
|
||||||
.align 5
|
.align 5
|
||||||
ENTRY(AES_encrypt)
|
ENTRY(AES_encrypt)
|
||||||
sub r3,pc,#8 @ AES_encrypt
|
adr r3,AES_encrypt
|
||||||
stmdb sp!,{r1,r4-r12,lr}
|
stmdb sp!,{r1,r4-r12,lr}
|
||||||
mov r12,r0 @ inp
|
mov r12,r0 @ inp
|
||||||
mov r11,r2
|
mov r11,r2
|
||||||
@ -381,7 +381,7 @@ _armv4_AES_encrypt:
|
|||||||
.align 5
|
.align 5
|
||||||
ENTRY(private_AES_set_encrypt_key)
|
ENTRY(private_AES_set_encrypt_key)
|
||||||
_armv4_AES_set_encrypt_key:
|
_armv4_AES_set_encrypt_key:
|
||||||
sub r3,pc,#8 @ AES_set_encrypt_key
|
adr r3,_armv4_AES_set_encrypt_key
|
||||||
teq r0,#0
|
teq r0,#0
|
||||||
moveq r0,#-1
|
moveq r0,#-1
|
||||||
beq .Labrt
|
beq .Labrt
|
||||||
@ -843,7 +843,7 @@ AES_Td:
|
|||||||
@ const AES_KEY *key) {
|
@ const AES_KEY *key) {
|
||||||
.align 5
|
.align 5
|
||||||
ENTRY(AES_decrypt)
|
ENTRY(AES_decrypt)
|
||||||
sub r3,pc,#8 @ AES_decrypt
|
adr r3,AES_decrypt
|
||||||
stmdb sp!,{r1,r4-r12,lr}
|
stmdb sp!,{r1,r4-r12,lr}
|
||||||
mov r12,r0 @ inp
|
mov r12,r0 @ inp
|
||||||
mov r11,r2
|
mov r11,r2
|
||||||
|
|||||||
@ -19,6 +19,13 @@
|
|||||||
#include <asm/unified.h>
|
#include <asm/unified.h>
|
||||||
#include <asm/compiler.h>
|
#include <asm/compiler.h>
|
||||||
|
|
||||||
|
#if __LINUX_ARM_ARCH__ < 6
|
||||||
|
#include <asm-generic/uaccess-unaligned.h>
|
||||||
|
#else
|
||||||
|
#define __get_user_unaligned __get_user
|
||||||
|
#define __put_user_unaligned __put_user
|
||||||
|
#endif
|
||||||
|
|
||||||
#define VERIFY_READ 0
|
#define VERIFY_READ 0
|
||||||
#define VERIFY_WRITE 1
|
#define VERIFY_WRITE 1
|
||||||
|
|
||||||
|
|||||||
@ -442,10 +442,10 @@ local_restart:
|
|||||||
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
|
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
|
||||||
|
|
||||||
add r1, sp, #S_OFF
|
add r1, sp, #S_OFF
|
||||||
cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
||||||
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
|
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
|
||||||
bcs arm_syscall
|
bcs arm_syscall
|
||||||
2: mov why, #0 @ no longer a real syscall
|
mov why, #0 @ no longer a real syscall
|
||||||
b sys_ni_syscall @ not private func
|
b sys_ni_syscall @ not private func
|
||||||
|
|
||||||
#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI)
|
#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI)
|
||||||
|
|||||||
@ -329,10 +329,10 @@
|
|||||||
#ifdef CONFIG_CONTEXT_TRACKING
|
#ifdef CONFIG_CONTEXT_TRACKING
|
||||||
.if \save
|
.if \save
|
||||||
stmdb sp!, {r0-r3, ip, lr}
|
stmdb sp!, {r0-r3, ip, lr}
|
||||||
bl user_exit
|
bl context_tracking_user_exit
|
||||||
ldmia sp!, {r0-r3, ip, lr}
|
ldmia sp!, {r0-r3, ip, lr}
|
||||||
.else
|
.else
|
||||||
bl user_exit
|
bl context_tracking_user_exit
|
||||||
.endif
|
.endif
|
||||||
#endif
|
#endif
|
||||||
.endm
|
.endm
|
||||||
@ -341,10 +341,10 @@
|
|||||||
#ifdef CONFIG_CONTEXT_TRACKING
|
#ifdef CONFIG_CONTEXT_TRACKING
|
||||||
.if \save
|
.if \save
|
||||||
stmdb sp!, {r0-r3, ip, lr}
|
stmdb sp!, {r0-r3, ip, lr}
|
||||||
bl user_enter
|
bl context_tracking_user_enter
|
||||||
ldmia sp!, {r0-r3, ip, lr}
|
ldmia sp!, {r0-r3, ip, lr}
|
||||||
.else
|
.else
|
||||||
bl user_enter
|
bl context_tracking_user_enter
|
||||||
.endif
|
.endif
|
||||||
#endif
|
#endif
|
||||||
.endm
|
.endm
|
||||||
|
|||||||
@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = {
|
|||||||
*/
|
*/
|
||||||
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
||||||
{
|
{
|
||||||
struct kvm_regs *cpu_reset;
|
struct kvm_regs *reset_regs;
|
||||||
const struct kvm_irq_level *cpu_vtimer_irq;
|
const struct kvm_irq_level *cpu_vtimer_irq;
|
||||||
|
|
||||||
switch (vcpu->arch.target) {
|
switch (vcpu->arch.target) {
|
||||||
case KVM_ARM_TARGET_CORTEX_A15:
|
case KVM_ARM_TARGET_CORTEX_A15:
|
||||||
if (vcpu->vcpu_id > a15_max_cpu_idx)
|
if (vcpu->vcpu_id > a15_max_cpu_idx)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
cpu_reset = &a15_regs_reset;
|
reset_regs = &a15_regs_reset;
|
||||||
vcpu->arch.midr = read_cpuid_id();
|
vcpu->arch.midr = read_cpuid_id();
|
||||||
cpu_vtimer_irq = &a15_vtimer_irq;
|
cpu_vtimer_irq = &a15_vtimer_irq;
|
||||||
break;
|
break;
|
||||||
@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Reset core registers */
|
/* Reset core registers */
|
||||||
memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs));
|
memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs));
|
||||||
|
|
||||||
/* Reset CP15 registers */
|
/* Reset CP15 registers */
|
||||||
kvm_reset_coprocs(vcpu);
|
kvm_reset_coprocs(vcpu);
|
||||||
|
|||||||
@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
|
|||||||
|
|
||||||
static struct irqaction at91rm9200_timer_irq = {
|
static struct irqaction at91rm9200_timer_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||||
.handler = at91rm9200_timer_interrupt,
|
.handler = at91rm9200_timer_interrupt,
|
||||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||||
};
|
};
|
||||||
|
|||||||
@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
|
|||||||
|
|
||||||
static struct irqaction at91sam926x_pit_irq = {
|
static struct irqaction at91sam926x_pit_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||||
.handler = at91sam926x_pit_interrupt,
|
.handler = at91sam926x_pit_interrupt,
|
||||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||||
};
|
};
|
||||||
|
|||||||
@ -16,11 +16,17 @@
|
|||||||
#include "at91_rstc.h"
|
#include "at91_rstc.h"
|
||||||
.arm
|
.arm
|
||||||
|
|
||||||
|
/*
|
||||||
|
* at91_ramc_base is an array void*
|
||||||
|
* init at NULL if only one DDR controler is present in or DT
|
||||||
|
*/
|
||||||
.globl at91sam9g45_restart
|
.globl at91sam9g45_restart
|
||||||
|
|
||||||
at91sam9g45_restart:
|
at91sam9g45_restart:
|
||||||
ldr r5, =at91_ramc_base @ preload constants
|
ldr r5, =at91_ramc_base @ preload constants
|
||||||
ldr r0, [r5]
|
ldr r0, [r5]
|
||||||
|
ldr r5, [r5, #4] @ ddr1
|
||||||
|
cmp r5, #0
|
||||||
ldr r4, =at91_rstc_base
|
ldr r4, =at91_rstc_base
|
||||||
ldr r1, [r4]
|
ldr r1, [r4]
|
||||||
|
|
||||||
@ -30,6 +36,8 @@ at91sam9g45_restart:
|
|||||||
|
|
||||||
.balign 32 @ align to cache line
|
.balign 32 @ align to cache line
|
||||||
|
|
||||||
|
strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
|
||||||
|
strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
|
||||||
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
||||||
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
||||||
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
||||||
|
|||||||
@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
|
|||||||
|
|
||||||
static struct irqaction at91x40_timer_irq = {
|
static struct irqaction at91x40_timer_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_DISABLED | IRQF_TIMER,
|
.flags = IRQF_TIMER,
|
||||||
.handler = at91x40_timer_interrupt
|
.handler = at91x40_timer_interrupt
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = {
|
|||||||
.context = (void *)0x7f00,
|
.context = (void *)0x7f00,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct snd_platform_data dm365_evm_snd_data = {
|
static struct snd_platform_data dm365_evm_snd_data __maybe_unused = {
|
||||||
.asp_chan_q = EVENTQ_3,
|
.asp_chan_q = EVENTQ_3,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -15,8 +15,6 @@
|
|||||||
|
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
|
|
||||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||||
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
||||||
@ -39,6 +37,8 @@
|
|||||||
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
extern int davinci_serial_init(struct platform_device *);
|
extern int davinci_serial_init(struct platform_device *);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
@ -90,6 +90,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
|
|||||||
init.ops = &clk_fixup_mux_ops;
|
init.ops = &clk_fixup_mux_ops;
|
||||||
init.parent_names = parents;
|
init.parent_names = parents;
|
||||||
init.num_parents = num_parents;
|
init.num_parents = num_parents;
|
||||||
|
init.flags = 0;
|
||||||
|
|
||||||
fixup_mux->mux.reg = reg;
|
fixup_mux->mux.reg = reg;
|
||||||
fixup_mux->mux.shift = shift;
|
fixup_mux->mux.shift = shift;
|
||||||
|
|||||||
@ -285,7 +285,7 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||||||
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
|
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
|
||||||
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
|
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
|
||||||
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
|
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
|
||||||
clk_register_clkdev(clk[cpu_div], NULL, "cpufreq-cpu0.0");
|
clk_register_clkdev(clk[cpu_div], NULL, "cpu0");
|
||||||
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
|
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
|
||||||
|
|
||||||
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
|
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
|
||||||
|
|||||||
@ -328,7 +328,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||||
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
|
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
|
||||||
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
|
clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
|
||||||
clk_register_clkdev(clk[cpu_podf], NULL, "cpufreq-cpu0.0");
|
clk_register_clkdev(clk[cpu_podf], NULL, "cpu0");
|
||||||
clk_register_clkdev(clk[iim_gate], "iim", NULL);
|
clk_register_clkdev(clk[iim_gate], "iim", NULL);
|
||||||
clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.0");
|
clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.0");
|
||||||
clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.1");
|
clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.1");
|
||||||
@ -397,7 +397,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
|
|||||||
mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel));
|
mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel));
|
||||||
clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2,
|
clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2,
|
||||||
spdif_sel, ARRAY_SIZE(spdif_sel));
|
spdif_sel, ARRAY_SIZE(spdif_sel));
|
||||||
clk[spdif1_pred] = imx_clk_divider("spdif1_podf", "spdif1_sel", MXC_CCM_CDCDR, 16, 3);
|
clk[spdif1_pred] = imx_clk_divider("spdif1_pred", "spdif1_sel", MXC_CCM_CDCDR, 16, 3);
|
||||||
clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6);
|
clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6);
|
||||||
clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1,
|
clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1,
|
||||||
mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel));
|
mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel));
|
||||||
|
|||||||
@ -233,10 +233,15 @@ put_node:
|
|||||||
of_node_put(np);
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init imx6q_opp_init(struct device *cpu_dev)
|
static void __init imx6q_opp_init(void)
|
||||||
{
|
{
|
||||||
struct device_node *np;
|
struct device_node *np;
|
||||||
|
struct device *cpu_dev = get_cpu_device(0);
|
||||||
|
|
||||||
|
if (!cpu_dev) {
|
||||||
|
pr_warn("failed to get cpu0 device\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
np = of_node_get(cpu_dev->of_node);
|
np = of_node_get(cpu_dev->of_node);
|
||||||
if (!np) {
|
if (!np) {
|
||||||
pr_warn("failed to find cpu0 node\n");
|
pr_warn("failed to find cpu0 node\n");
|
||||||
@ -268,7 +273,7 @@ static void __init imx6q_init_late(void)
|
|||||||
imx6q_cpuidle_init();
|
imx6q_cpuidle_init();
|
||||||
|
|
||||||
if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
|
if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
|
||||||
imx6q_opp_init(&imx6q_cpufreq_pdev.dev);
|
imx6q_opp_init();
|
||||||
platform_device_register(&imx6q_cpufreq_pdev);
|
platform_device_register(&imx6q_cpufreq_pdev);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -117,6 +117,17 @@ void __init imx_init_l2cache(void)
|
|||||||
/* Configure the L2 PREFETCH and POWER registers */
|
/* Configure the L2 PREFETCH and POWER registers */
|
||||||
val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
|
val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
|
||||||
val |= 0x70800000;
|
val |= 0x70800000;
|
||||||
|
/*
|
||||||
|
* The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
|
||||||
|
* The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
|
||||||
|
* But according to ARM PL310 errata: 752271
|
||||||
|
* ID: 752271: Double linefill feature can cause data corruption
|
||||||
|
* Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
|
||||||
|
* Workaround: The only workaround to this erratum is to disable the
|
||||||
|
* double linefill feature. This is the default behavior.
|
||||||
|
*/
|
||||||
|
if (cpu_is_imx6q())
|
||||||
|
val &= ~(1 << 30 | 1 << 23);
|
||||||
writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
|
writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
|
||||||
val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
|
val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
|
||||||
writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
|
writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
|
||||||
|
|||||||
@ -1,2 +1,9 @@
|
|||||||
/* Simple oneliner include to the PCIv3 early init */
|
/* Simple oneliner include to the PCIv3 early init */
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
extern int pci_v3_early_init(void);
|
extern int pci_v3_early_init(void);
|
||||||
|
#else
|
||||||
|
static inline int pci_v3_early_init(void)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|||||||
@ -140,6 +140,7 @@ int __init coherency_init(void)
|
|||||||
coherency_base = of_iomap(np, 0);
|
coherency_base = of_iomap(np, 0);
|
||||||
coherency_cpu_base = of_iomap(np, 1);
|
coherency_cpu_base = of_iomap(np, 1);
|
||||||
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
|
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@ -147,9 +148,14 @@ int __init coherency_init(void)
|
|||||||
|
|
||||||
static int __init coherency_late_init(void)
|
static int __init coherency_late_init(void)
|
||||||
{
|
{
|
||||||
if (of_find_matching_node(NULL, of_coherency_table))
|
struct device_node *np;
|
||||||
|
|
||||||
|
np = of_find_matching_node(NULL, of_coherency_table);
|
||||||
|
if (np) {
|
||||||
bus_register_notifier(&platform_bus_type,
|
bus_register_notifier(&platform_bus_type,
|
||||||
&mvebu_hwcc_platform_nb);
|
&mvebu_hwcc_platform_nb);
|
||||||
|
of_node_put(np);
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
|
|||||||
pr_info("Initializing Power Management Service Unit\n");
|
pr_info("Initializing Power Management Service Unit\n");
|
||||||
pmsu_mp_base = of_iomap(np, 0);
|
pmsu_mp_base = of_iomap(np, 0);
|
||||||
pmsu_reset_base = of_iomap(np, 1);
|
pmsu_reset_base = of_iomap(np, 1);
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
|
|||||||
BUG_ON(!match);
|
BUG_ON(!match);
|
||||||
system_controller_base = of_iomap(np, 0);
|
system_controller_base = of_iomap(np, 0);
|
||||||
mvebu_sc = (struct mvebu_system_controller *)match->data;
|
mvebu_sc = (struct mvebu_system_controller *)match->data;
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@ -1632,7 +1632,7 @@ static struct omap_clk omap44xx_clks[] = {
|
|||||||
CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck),
|
CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck),
|
||||||
CLK(NULL, "auxclk5_ck", &auxclk5_ck),
|
CLK(NULL, "auxclk5_ck", &auxclk5_ck),
|
||||||
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck),
|
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck),
|
||||||
CLK("omap-gpmc", "fck", &dummy_ck),
|
CLK("50000000.gpmc", "fck", &dummy_ck),
|
||||||
CLK("omap_i2c.1", "ick", &dummy_ck),
|
CLK("omap_i2c.1", "ick", &dummy_ck),
|
||||||
CLK("omap_i2c.2", "ick", &dummy_ck),
|
CLK("omap_i2c.2", "ick", &dummy_ck),
|
||||||
CLK("omap_i2c.3", "ick", &dummy_ck),
|
CLK("omap_i2c.3", "ick", &dummy_ck),
|
||||||
|
|||||||
@ -143,7 +143,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||||||
* Call idle CPU cluster PM exit notifier chain
|
* Call idle CPU cluster PM exit notifier chain
|
||||||
* to restore GIC and wakeupgen context.
|
* to restore GIC and wakeupgen context.
|
||||||
*/
|
*/
|
||||||
if ((cx->mpu_state == PWRDM_POWER_RET) &&
|
if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) &&
|
||||||
(cx->mpu_logic_state == PWRDM_POWER_OFF))
|
(cx->mpu_logic_state == PWRDM_POWER_OFF))
|
||||||
cpu_cluster_pm_exit();
|
cpu_cluster_pm_exit();
|
||||||
|
|
||||||
|
|||||||
@ -1491,8 +1491,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
|
|||||||
*/
|
*/
|
||||||
ret = gpmc_cs_remap(cs, res.start);
|
ret = gpmc_cs_remap(cs, res.start);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n",
|
dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n",
|
||||||
cs, res.start);
|
cs, &res.start);
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -620,7 +620,7 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
|
|||||||
"uart1_rts", "ssi1_flag_tx", NULL, NULL,
|
"uart1_rts", "ssi1_flag_tx", NULL, NULL,
|
||||||
"gpio_149", NULL, NULL, "safe_mode"),
|
"gpio_149", NULL, NULL, "safe_mode"),
|
||||||
_OMAP3_MUXENTRY(UART1_RX, 151,
|
_OMAP3_MUXENTRY(UART1_RX, 151,
|
||||||
"uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
|
"uart1_rx", "ssi1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
|
||||||
"gpio_151", NULL, NULL, "safe_mode"),
|
"gpio_151", NULL, NULL, "safe_mode"),
|
||||||
_OMAP3_MUXENTRY(UART1_TX, 148,
|
_OMAP3_MUXENTRY(UART1_TX, 148,
|
||||||
"uart1_tx", "ssi1_dat_tx", NULL, NULL,
|
"uart1_tx", "ssi1_dat_tx", NULL, NULL,
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* OMAP4 SMP source file. It contains platform specific fucntions
|
* OMAP4 SMP source file. It contains platform specific functions
|
||||||
* needed for the linux smp kernel.
|
* needed for the linux smp kernel.
|
||||||
*
|
*
|
||||||
* Copyright (C) 2009 Texas Instruments, Inc.
|
* Copyright (C) 2009 Texas Instruments, Inc.
|
||||||
|
|||||||
@ -158,7 +158,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
od = omap_device_alloc(pdev, hwmods, oh_cnt);
|
od = omap_device_alloc(pdev, hwmods, oh_cnt);
|
||||||
if (!od) {
|
if (IS_ERR(od)) {
|
||||||
dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n",
|
dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n",
|
||||||
oh_name);
|
oh_name);
|
||||||
ret = PTR_ERR(od);
|
ret = PTR_ERR(od);
|
||||||
|
|||||||
@ -289,7 +289,7 @@ static void collie_flash_exit(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
static struct flash_platform_data collie_flash_data = {
|
static struct flash_platform_data collie_flash_data = {
|
||||||
.map_name = "cfi_probe",
|
.map_name = "jedec_probe",
|
||||||
.init = collie_flash_init,
|
.init = collie_flash_init,
|
||||||
.set_vpp = collie_set_vpp,
|
.set_vpp = collie_set_vpp,
|
||||||
.exit = collie_flash_exit,
|
.exit = collie_flash_exit,
|
||||||
|
|||||||
@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
|
|||||||
PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
|
PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
|
||||||
"fsib_mclk_in", "fsib"),
|
"fsib_mclk_in", "fsib"),
|
||||||
/* GETHER */
|
/* GETHER */
|
||||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
|
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
|
||||||
"gether_mii", "gether"),
|
"gether_mii", "gether"),
|
||||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
|
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
|
||||||
"gether_int", "gether"),
|
"gether_int", "gether"),
|
||||||
/* HDMI */
|
/* HDMI */
|
||||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
|
PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
|
||||||
|
|||||||
@ -29,6 +29,7 @@
|
|||||||
#include <linux/pinctrl/machine.h>
|
#include <linux/pinctrl/machine.h>
|
||||||
#include <linux/platform_data/gpio-rcar.h>
|
#include <linux/platform_data/gpio-rcar.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/phy.h>
|
||||||
#include <linux/regulator/fixed.h>
|
#include <linux/regulator/fixed.h>
|
||||||
#include <linux/regulator/machine.h>
|
#include <linux/regulator/machine.h>
|
||||||
#include <linux/sh_eth.h>
|
#include <linux/sh_eth.h>
|
||||||
@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
|
|||||||
ðer_pdata, sizeof(ether_pdata));
|
ðer_pdata, sizeof(ether_pdata));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
|
||||||
|
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
|
||||||
|
* 14-15. We have to set them back to 01 from the default 00 value each time
|
||||||
|
* the PHY is reset. It's also important because the PHY's LED0 signal is
|
||||||
|
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
|
||||||
|
* bounce on and off after each packet, which we apparently want to avoid.
|
||||||
|
*/
|
||||||
|
static int lager_ksz8041_fixup(struct phy_device *phydev)
|
||||||
|
{
|
||||||
|
u16 phyctrl1 = phy_read(phydev, 0x1e);
|
||||||
|
|
||||||
|
phyctrl1 &= ~0xc000;
|
||||||
|
phyctrl1 |= 0x4000;
|
||||||
|
return phy_write(phydev, 0x1e, phyctrl1);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __init lager_init(void)
|
||||||
|
{
|
||||||
|
lager_add_standard_devices();
|
||||||
|
|
||||||
|
phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
|
||||||
|
}
|
||||||
|
|
||||||
static const char *lager_boards_compat_dt[] __initdata = {
|
static const char *lager_boards_compat_dt[] __initdata = {
|
||||||
"renesas,lager",
|
"renesas,lager",
|
||||||
NULL,
|
NULL,
|
||||||
@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
|
|||||||
DT_MACHINE_START(LAGER_DT, "lager")
|
DT_MACHINE_START(LAGER_DT, "lager")
|
||||||
.init_early = r8a7790_init_delay,
|
.init_early = r8a7790_init_delay,
|
||||||
.init_time = r8a7790_timer_init,
|
.init_time = r8a7790_timer_init,
|
||||||
.init_machine = lager_add_standard_devices,
|
.init_machine = lager_init,
|
||||||
.dt_compat = lager_boards_compat_dt,
|
.dt_compat = lager_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|||||||
@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = {
|
|||||||
CLKDEV_CON_ID("pll2h", &pll2h_clk),
|
CLKDEV_CON_ID("pll2h", &pll2h_clk),
|
||||||
|
|
||||||
/* CPU clock */
|
/* CPU clock */
|
||||||
CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk),
|
CLKDEV_DEV_ID("cpu0", &z_clk),
|
||||||
|
|
||||||
/* DIV6 */
|
/* DIV6 */
|
||||||
CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
|
CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
|
||||||
|
|||||||
@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = {
|
|||||||
CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */
|
CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */
|
||||||
|
|
||||||
/* DIV4 clocks */
|
/* DIV4 clocks */
|
||||||
CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]),
|
CLKDEV_DEV_ID("cpu0", &div4_clks[DIV4_Z]),
|
||||||
|
|
||||||
/* DIV6 clocks */
|
/* DIV6 clocks */
|
||||||
CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
|
CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
|
||||||
|
|||||||
@ -1,7 +1,3 @@
|
|||||||
menu "ST-Ericsson AB U300/U335 Platform"
|
|
||||||
|
|
||||||
comment "ST-Ericsson Mobile Platform Products"
|
|
||||||
|
|
||||||
config ARCH_U300
|
config ARCH_U300
|
||||||
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
|
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
|
||||||
depends on MMU
|
depends on MMU
|
||||||
@ -25,7 +21,9 @@ config ARCH_U300
|
|||||||
help
|
help
|
||||||
Support for ST-Ericsson U300 series mobile platforms.
|
Support for ST-Ericsson U300 series mobile platforms.
|
||||||
|
|
||||||
comment "ST-Ericsson U300/U335 Feature Selections"
|
if ARCH_U300
|
||||||
|
|
||||||
|
menu "ST-Ericsson AB U300/U335 Platform"
|
||||||
|
|
||||||
config MACH_U300
|
config MACH_U300
|
||||||
depends on ARCH_U300
|
depends on ARCH_U300
|
||||||
@ -53,3 +51,5 @@ config MACH_U300_SPIDUMMY
|
|||||||
SPI framework and ARM PL022 support.
|
SPI framework and ARM PL022 support.
|
||||||
|
|
||||||
endmenu
|
endmenu
|
||||||
|
|
||||||
|
endif
|
||||||
|
|||||||
@ -69,6 +69,7 @@ static int __init ux500_l2x0_init(void)
|
|||||||
* some SMI service available.
|
* some SMI service available.
|
||||||
*/
|
*/
|
||||||
outer_cache.disable = NULL;
|
outer_cache.disable = NULL;
|
||||||
|
outer_cache.set_debug = NULL;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency)
|
|||||||
} else
|
} else
|
||||||
BUG();
|
BUG();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If the CPU is committed to power down, make sure
|
||||||
|
* the power controller will be in charge of waking it
|
||||||
|
* up upon IRQ, ie IRQ lines are cut from GIC CPU IF
|
||||||
|
* to the CPU by disabling the GIC CPU IF to prevent wfi
|
||||||
|
* from completing execution behind power controller back
|
||||||
|
*/
|
||||||
|
if (!skip_wfi)
|
||||||
|
gic_cpu_if_down();
|
||||||
|
|
||||||
if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
|
if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
|
||||||
arch_spin_unlock(&tc2_pm_lock);
|
arch_spin_unlock(&tc2_pm_lock);
|
||||||
|
|
||||||
@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency)
|
|||||||
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||||
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
|
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
|
||||||
ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
|
ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
|
||||||
gic_cpu_if_down();
|
|
||||||
tc2_pm_down(residency);
|
tc2_pm_down(residency);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -6,13 +6,6 @@ config FRAME_POINTER
|
|||||||
bool
|
bool
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config DEBUG_STACK_USAGE
|
|
||||||
bool "Enable stack utilization instrumentation"
|
|
||||||
depends on DEBUG_KERNEL
|
|
||||||
help
|
|
||||||
Enables the display of the minimum amount of free stack which each
|
|
||||||
task has ever had available in the sysrq-T output.
|
|
||||||
|
|
||||||
config EARLY_PRINTK
|
config EARLY_PRINTK
|
||||||
bool "Early printk support"
|
bool "Early printk support"
|
||||||
default y
|
default y
|
||||||
|
|||||||
@ -42,7 +42,7 @@ CONFIG_IP_PNP_BOOTP=y
|
|||||||
# CONFIG_WIRELESS is not set
|
# CONFIG_WIRELESS is not set
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
# CONFIG_BLK_DEV is not set
|
CONFIG_BLK_DEV=y
|
||||||
CONFIG_SCSI=y
|
CONFIG_SCSI=y
|
||||||
# CONFIG_SCSI_PROC_FS is not set
|
# CONFIG_SCSI_PROC_FS is not set
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
@ -72,6 +72,7 @@ CONFIG_LOGO=y
|
|||||||
# CONFIG_IOMMU_SUPPORT is not set
|
# CONFIG_IOMMU_SUPPORT is not set
|
||||||
CONFIG_EXT2_FS=y
|
CONFIG_EXT2_FS=y
|
||||||
CONFIG_EXT3_FS=y
|
CONFIG_EXT3_FS=y
|
||||||
|
CONFIG_EXT4_FS=y
|
||||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||||
# CONFIG_EXT3_FS_XATTR is not set
|
# CONFIG_EXT3_FS_XATTR is not set
|
||||||
CONFIG_FUSE_FS=y
|
CONFIG_FUSE_FS=y
|
||||||
@ -90,3 +91,5 @@ CONFIG_DEBUG_KERNEL=y
|
|||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
# CONFIG_FTRACE is not set
|
# CONFIG_FTRACE is not set
|
||||||
CONFIG_ATOMIC64_SELFTEST=y
|
CONFIG_ATOMIC64_SELFTEST=y
|
||||||
|
CONFIG_VIRTIO_MMIO=y
|
||||||
|
CONFIG_VIRTIO_BLK=y
|
||||||
|
|||||||
@ -43,6 +43,6 @@
|
|||||||
COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
|
COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
|
||||||
COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
|
COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
|
||||||
|
|
||||||
extern unsigned int elf_hwcap;
|
extern unsigned long elf_hwcap;
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -166,9 +166,10 @@ do { \
|
|||||||
|
|
||||||
#define get_user(x, ptr) \
|
#define get_user(x, ptr) \
|
||||||
({ \
|
({ \
|
||||||
|
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||||
might_fault(); \
|
might_fault(); \
|
||||||
access_ok(VERIFY_READ, (ptr), sizeof(*(ptr))) ? \
|
access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
|
||||||
__get_user((x), (ptr)) : \
|
__get_user((x), __p) : \
|
||||||
((x) = 0, -EFAULT); \
|
((x) = 0, -EFAULT); \
|
||||||
})
|
})
|
||||||
|
|
||||||
@ -227,9 +228,10 @@ do { \
|
|||||||
|
|
||||||
#define put_user(x, ptr) \
|
#define put_user(x, ptr) \
|
||||||
({ \
|
({ \
|
||||||
|
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||||
might_fault(); \
|
might_fault(); \
|
||||||
access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr))) ? \
|
access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
|
||||||
__put_user((x), (ptr)) : \
|
__put_user((x), __p) : \
|
||||||
-EFAULT; \
|
-EFAULT; \
|
||||||
})
|
})
|
||||||
|
|
||||||
|
|||||||
@ -80,8 +80,10 @@ void fpsimd_thread_switch(struct task_struct *next)
|
|||||||
|
|
||||||
void fpsimd_flush_thread(void)
|
void fpsimd_flush_thread(void)
|
||||||
{
|
{
|
||||||
|
preempt_disable();
|
||||||
memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
||||||
fpsimd_load_state(¤t->thread.fpsimd_state);
|
fpsimd_load_state(¤t->thread.fpsimd_state);
|
||||||
|
preempt_enable();
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_KERNEL_MODE_NEON
|
#ifdef CONFIG_KERNEL_MODE_NEON
|
||||||
|
|||||||
@ -143,15 +143,26 @@ void machine_restart(char *cmd)
|
|||||||
|
|
||||||
void __show_regs(struct pt_regs *regs)
|
void __show_regs(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
int i;
|
int i, top_reg;
|
||||||
|
u64 lr, sp;
|
||||||
|
|
||||||
|
if (compat_user_mode(regs)) {
|
||||||
|
lr = regs->compat_lr;
|
||||||
|
sp = regs->compat_sp;
|
||||||
|
top_reg = 12;
|
||||||
|
} else {
|
||||||
|
lr = regs->regs[30];
|
||||||
|
sp = regs->sp;
|
||||||
|
top_reg = 29;
|
||||||
|
}
|
||||||
|
|
||||||
show_regs_print_info(KERN_DEFAULT);
|
show_regs_print_info(KERN_DEFAULT);
|
||||||
print_symbol("PC is at %s\n", instruction_pointer(regs));
|
print_symbol("PC is at %s\n", instruction_pointer(regs));
|
||||||
print_symbol("LR is at %s\n", regs->regs[30]);
|
print_symbol("LR is at %s\n", lr);
|
||||||
printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
|
printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
|
||||||
regs->pc, regs->regs[30], regs->pstate);
|
regs->pc, lr, regs->pstate);
|
||||||
printk("sp : %016llx\n", regs->sp);
|
printk("sp : %016llx\n", sp);
|
||||||
for (i = 29; i >= 0; i--) {
|
for (i = top_reg; i >= 0; i--) {
|
||||||
printk("x%-2d: %016llx ", i, regs->regs[i]);
|
printk("x%-2d: %016llx ", i, regs->regs[i]);
|
||||||
if (i % 2 == 0)
|
if (i % 2 == 0)
|
||||||
printk("\n");
|
printk("\n");
|
||||||
|
|||||||
@ -57,7 +57,7 @@
|
|||||||
unsigned int processor_id;
|
unsigned int processor_id;
|
||||||
EXPORT_SYMBOL(processor_id);
|
EXPORT_SYMBOL(processor_id);
|
||||||
|
|
||||||
unsigned int elf_hwcap __read_mostly;
|
unsigned long elf_hwcap __read_mostly;
|
||||||
EXPORT_SYMBOL_GPL(elf_hwcap);
|
EXPORT_SYMBOL_GPL(elf_hwcap);
|
||||||
|
|
||||||
static const char *cpu_name;
|
static const char *cpu_name;
|
||||||
|
|||||||
@ -130,7 +130,7 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr,
|
|||||||
force_sig_info(sig, &si, tsk);
|
force_sig_info(sig, &si, tsk);
|
||||||
}
|
}
|
||||||
|
|
||||||
void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
struct task_struct *tsk = current;
|
struct task_struct *tsk = current;
|
||||||
struct mm_struct *mm = tsk->active_mm;
|
struct mm_struct *mm = tsk->active_mm;
|
||||||
|
|||||||
@ -35,7 +35,7 @@
|
|||||||
*/
|
*/
|
||||||
ENTRY(__cpu_flush_user_tlb_range)
|
ENTRY(__cpu_flush_user_tlb_range)
|
||||||
vma_vm_mm x3, x2 // get vma->vm_mm
|
vma_vm_mm x3, x2 // get vma->vm_mm
|
||||||
mmid x3, x3 // get vm_mm->context.id
|
mmid w3, x3 // get vm_mm->context.id
|
||||||
dsb sy
|
dsb sy
|
||||||
lsr x0, x0, #12 // align address
|
lsr x0, x0, #12 // align address
|
||||||
lsr x1, x1, #12
|
lsr x1, x1, #12
|
||||||
|
|||||||
@ -1,5 +1,19 @@
|
|||||||
|
|
||||||
generic-y += clkdev.h
|
generic-y += clkdev.h
|
||||||
|
generic-y += cputime.h
|
||||||
|
generic-y += delay.h
|
||||||
|
generic-y += device.h
|
||||||
|
generic-y += div64.h
|
||||||
|
generic-y += emergency-restart.h
|
||||||
generic-y += exec.h
|
generic-y += exec.h
|
||||||
generic-y += trace_clock.h
|
generic-y += futex.h
|
||||||
|
generic-y += irq_regs.h
|
||||||
generic-y += param.h
|
generic-y += param.h
|
||||||
|
generic-y += local.h
|
||||||
|
generic-y += local64.h
|
||||||
|
generic-y += percpu.h
|
||||||
|
generic-y += scatterlist.h
|
||||||
|
generic-y += sections.h
|
||||||
|
generic-y += topology.h
|
||||||
|
generic-y += trace_clock.h
|
||||||
|
generic-y += xor.h
|
||||||
|
|||||||
@ -1,6 +0,0 @@
|
|||||||
#ifndef __ASM_AVR32_CPUTIME_H
|
|
||||||
#define __ASM_AVR32_CPUTIME_H
|
|
||||||
|
|
||||||
#include <asm-generic/cputime.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_CPUTIME_H */
|
|
||||||
@ -1 +0,0 @@
|
|||||||
#include <asm-generic/delay.h>
|
|
||||||
@ -1,7 +0,0 @@
|
|||||||
/*
|
|
||||||
* Arch specific extensions to struct device
|
|
||||||
*
|
|
||||||
* This file is released under the GPLv2
|
|
||||||
*/
|
|
||||||
#include <asm-generic/device.h>
|
|
||||||
|
|
||||||
@ -1,6 +0,0 @@
|
|||||||
#ifndef __ASM_AVR32_DIV64_H
|
|
||||||
#define __ASM_AVR32_DIV64_H
|
|
||||||
|
|
||||||
#include <asm-generic/div64.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_DIV64_H */
|
|
||||||
@ -1,6 +0,0 @@
|
|||||||
#ifndef __ASM_AVR32_EMERGENCY_RESTART_H
|
|
||||||
#define __ASM_AVR32_EMERGENCY_RESTART_H
|
|
||||||
|
|
||||||
#include <asm-generic/emergency-restart.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */
|
|
||||||
@ -1,6 +0,0 @@
|
|||||||
#ifndef __ASM_AVR32_FUTEX_H
|
|
||||||
#define __ASM_AVR32_FUTEX_H
|
|
||||||
|
|
||||||
#include <asm-generic/futex.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_FUTEX_H */
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user