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Renesas ARM DT updates for v5.15

Browse Source 
- Switches support for the Draak and Ebisu development boards,
   - I2C support on RZ/G2L,
   - I2C EEPROM support on the Ebisu development board,
   - Sound support for the R-Car D3 SoC and the Draak development board,
   - Support for the new R-Car H3e-2G and M3e-2G SoCs on the Salvator-XS
     and ULCB development boards,
   - IOMMU support for DMAC, EtherAVB, and SDHI on the R-Car M3-W+ SoC,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.15

  - Switches support for the Draak and Ebisu development boards,
  - I2C support on RZ/G2L,
  - I2C EEPROM support on the Ebisu development board,
  - Sound support for the R-Car D3 SoC and the Draak development board,
  - Support for the new R-Car H3e-2G and M3e-2G SoCs on the Salvator-XS
    and ULCB development boards,
  - IOMMU support for DMAC, EtherAVB, and SDHI on the R-Car M3-W+ SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
  arm64: dts: renesas: r8a77961: Add iommus to ipmmu_ds[01] related nodes
  arm64: dts: renesas: Add support for M3ULCB+Kingfisher with R-Car M3e-2G
  arm64: dts: renesas: Add support for M3ULCB with R-Car M3e-2G
  arm64: dts: renesas: Add support for Salvator-XS with R-Car M3e-2G
  arm64: dts: renesas: Add support for H3ULCB+Kingfisher with R-Car H3e-2G
  arm64: dts: renesas: Add support for H3ULCB with R-Car H3e-2G
  arm64: dts: renesas: Add support for Salvator-XS with R-Car H3e-2G
  arm64: dts: renesas: Add Renesas R8A779M3 SoC support
  arm64: dts: renesas: Add Renesas R8A779M1 SoC support
  arm64: dts: renesas: hihope-rzg2-ex: Add EtherAVB internal rx delay
  arm64: dts: renesas: r8a77995: draak: Add R-Car Sound support
  arm64: dts: renesas: r8a77995: Add R-Car Sound support
  arm64: dts: renesas: rcar-gen3: Add SoC model to comment headers
  arm64: dts: renesas: r8a77990: ebisu: Add I2C EEPROM for PMIC
  arm64: dts: renesas: r8a77995: draak: Remove bogus adv7511w properties
  arm64: dts: renesas: beacon: Enable micbias
  arm64: dts: renesas: r9a07g044: Add I2C nodes
  arm64: dts: renesas: r8a779a0: Restore sort order
  arm64: dts: renesas: r8a77990: ebisu: Add SW4 support
  arm64: dts: renesas: r8a77995: draak: Add SW56 support
  ...

Link: https://lore.kernel.org/r/cover.1627650696.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-08-02 15:23:21 +02:00
commit 272614ec1b
47 changed files with 943 additions and 371 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
arch/arm/boot/dts/r8a73a4.dtsi
View File

@ -72,50 +72,6 @@
power-domains = <&pd_a3bc>;
};
dmac: dma-multiplexer {
compatible = "renesas,shdma-mux";
#dma-cells = <1>;
dma-channels = <20>;
dma-requests = <256>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma0: dma-controller@e6700020 {
compatible = "renesas,shdma-r8a73a4";
reg = <0 0xe6700020 0 0x89e0>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19";
clocks = <&mstp2_clks R8A73A4_CLK_DMAC>;
power-domains = <&pd_a3sp>;
};
};
i2c5: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/r8a7742.dtsi
View File

@ -602,7 +602,9 @@
iic3: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7742";
compatible = "renesas,iic-r8a7742",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;

4
arch/arm/boot/dts/r8a7743.dtsi
View File

@ -552,7 +552,9 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7743";
compatible = "renesas,iic-r8a7743",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;

4
arch/arm/boot/dts/r8a7744.dtsi
View File

@ -552,7 +552,9 @@
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7744";
compatible = "renesas,iic-r8a7744",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;

8
arch/arm64/boot/dts/renesas/Makefile
View File

@ -63,4 +63,12 @@ dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb.dtb
dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb

8
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
View File

@ -197,6 +197,14 @@
compatible = "audio-graph-card";
label = "rcar-sound";
dais = <&rsnd_port0>, <&rsnd_port1>;
widgets = "Microphone", "Mic Jack",
"Line", "Line In Jack",
"Headphone", "Headphone Jack";
mic-det-gpio = <&gpio0 2 GPIO_ACTIVE_LOW>;
routing = "Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN3R", "MICBIAS",
"Mic Jack", "IN3R";
};
vccq_sdhi0: regulator-vccq-sdhi0 {

1
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
View File

@ -20,6 +20,7 @@
pinctrl-names = "default";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
rx-internal-delay-ps = <1800>;
status = "okay";
phy0: ethernet-phy@0 {

4
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
View File

@ -25,7 +25,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
i2c7 = &i2c_dvfs;
i2c7 = &iic_pmic;
};
/*
@ -715,7 +715,7 @@
status = "disabled";
};
i2c_dvfs: i2c@e60b0000 {
iic_pmic: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a774a1",

2
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
View File

@ -588,7 +588,7 @@
status = "disabled";
};
i2c_dvfs: i2c@e60b0000 {
iic_pmic: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a774b1",

8
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
View File

@ -574,11 +574,13 @@
status = "disabled";
};
i2c_dvfs: i2c@e60b0000 {
iic_pmic: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a774c0";
reg = <0 0xe60b0000 0 0x15>;
compatible = "renesas,iic-r8a774c0",
"renesas,rcar-gen3-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

73
arch/arm64/boot/dts/renesas/r8a77950-salvator-x.dts
View File

@ -47,76 +47,3 @@
clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
&ehci2 {
status = "okay";
};
&hdmi1 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi1_out: endpoint {
remote-endpoint = <&hdmi1_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi1_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint2>;
};
};
};
};
&hdmi1_con {
remote-endpoint = <&rcar_dw_hdmi1_out>;
};
&ohci2 {
status = "okay";
};
&pfc {
usb2_pins: usb2 {
groups = "usb2";
function = "usb2";
};
};
&rcar_sound {
ports {
/* rsnd_port0/1 are described in salvator-common.dtsi */
rsnd_port2: port@2 {
reg = <2>;
rsnd_endpoint2: endpoint {
remote-endpoint = <&dw_hdmi1_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint2>;
frame-master = <&rsnd_endpoint2>;
playback = <&ssi3>;
};
};
};
};
&sata {
status = "okay";
};
&sound_card {
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1 /* HDMI0 */
&rsnd_port2>; /* HDMI1 */
};
&usb2_phy2 {
pinctrl-0 = <&usb2_pins>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/renesas/r8a77950-ulcb-kf.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the H3ULCB Kingfisher board
* Device Tree Source for the H3ULCB Kingfisher board with R-Car H3 ES1.x
*
* Copyright (C) 2017 Renesas Electronics Corp.
* Copyright (C) 2017 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77950-ulcb.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES1.x
*
* Copyright (C) 2016 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77950.dtsi
View File

@ -7,6 +7,8 @@
#include "r8a77951.dtsi"
#undef SOC_HAS_USB2_CH3
&audma0 {
iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
<&ipmmu_mp1 2>, <&ipmmu_mp1 3>,

73
arch/arm64/boot/dts/renesas/r8a77951-salvator-x.dts
View File

@ -47,76 +47,3 @@
clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
&ehci2 {
status = "okay";
};
&hdmi1 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi1_out: endpoint {
remote-endpoint = <&hdmi1_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi1_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint2>;
};
};
};
};
&hdmi1_con {
remote-endpoint = <&rcar_dw_hdmi1_out>;
};
&ohci2 {
status = "okay";
};
&pfc {
usb2_pins: usb2 {
groups = "usb2";
function = "usb2";
};
};
&rcar_sound {
ports {
/* rsnd_port0/1 are described in salvator-common.dtsi */
rsnd_port2: port@2 {
reg = <2>;
rsnd_endpoint2: endpoint {
remote-endpoint = <&dw_hdmi1_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint2>;
frame-master = <&rsnd_endpoint2>;
playback = <&ssi3>;
};
};
};
};
&sata {
status = "okay";
};
&sound_card {
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1 /* HDMI0 */
&rsnd_port2>; /* HDMI1 */
};
&usb2_phy2 {
pinctrl-0 = <&usb2_pins>;
pinctrl-names = "default";
status = "okay";
};

122
arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dts
View File

@ -47,125 +47,3 @@
clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};
&ehci2 {
status = "okay";
};
&ehci3 {
dr_mode = "otg";
status = "okay";
};
&hdmi1 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi1_out: endpoint {
remote-endpoint = <&hdmi1_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi1_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint2>;
};
};
};
};
&hdmi1_con {
remote-endpoint = <&rcar_dw_hdmi1_out>;
};
&hsusb3 {
dr_mode = "otg";
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
dr_mode = "otg";
status = "okay";
};
&pca9654 {
pcie-sata-switch-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-low; /* enable SATA by default */
line-name = "PCIE/SATA switch";
};
};
&pfc {
usb2_pins: usb2 {
groups = "usb2";
function = "usb2";
};
/*
* - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
* (when SW31 is the default setting on Salvator-XS).
* - If SW31 is the default setting, you cannot use USB2.0 ch3 on
* r8a77951 with Salvator-XS.
* Hence the SW31 setting must be changed like 2) below.
* 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
* - Connect GP6_3[01] to ADV7842.
* 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
* - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
* - Connect GP6_{04,21} to ADV7842.
*/
usb2_ch3_pins: usb2_ch3 {
groups = "usb2_ch3";
function = "usb2_ch3";
};
};
&rcar_sound {
ports {
/* rsnd_port0/1 are described in salvator-common.dtsi */
rsnd_port2: port@2 {
reg = <2>;
rsnd_endpoint2: endpoint {
remote-endpoint = <&dw_hdmi1_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint2>;
frame-master = <&rsnd_endpoint2>;
playback = <&ssi3>;
};
};
};
};
/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
&sata {
status = "okay";
};
&sound_card {
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1 /* HDMI0 */
&rsnd_port2>; /* HDMI1 */
};
&usb2_phy2 {
pinctrl-0 = <&usb2_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb2_phy3 {
pinctrl-0 = <&usb2_ch3_pins>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/renesas/r8a77951-ulcb-kf.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the H3ULCB Kingfisher board
* Device Tree Source for the H3ULCB Kingfisher board with R-Car H3 ES2.0+
*
* Copyright (C) 2017 Renesas Electronics Corp.
* Copyright (C) 2017 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77951-ulcb.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES2.0+
*
* Copyright (C) 2016 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.

5
arch/arm64/boot/dts/renesas/r8a77951.dtsi
View File

@ -11,6 +11,11 @@
#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
#define SOC_HAS_HDMI1
#define SOC_HAS_SATA
#define SOC_HAS_USB2_CH2
#define SOC_HAS_USB2_CH3
/ {
compatible = "renesas,r8a7795";
#address-cells = <2>;

2
arch/arm64/boot/dts/renesas/r8a77960-ulcb-kf.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3ULCB Kingfisher board
* Device Tree Source for the M3ULCB Kingfisher board with R-Car M3-W
*
* Copyright (C) 2017 Renesas Electronics Corp.
* Copyright (C) 2017 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77960-ulcb.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W
*
* Copyright (C) 2016 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77961-ulcb-kf.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3ULCB Kingfisher board
* Device Tree Source for the M3ULCB Kingfisher board with R-Car M3-W+
*
* Copyright (C) 2020 Eugeniu Rosca <rosca.eugeniu@gmail.com>
*/

3
arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car
* M3-W+
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W+
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/

29
arch/arm64/boot/dts/renesas/r8a77961.dtsi
View File

@ -958,6 +958,14 @@
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
<&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
<&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
<&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
<&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
<&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
<&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
<&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
};
dmac1: dma-controller@e7300000 {
@ -992,6 +1000,14 @@
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
<&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
<&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
<&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
<&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
<&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
<&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
<&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
};
dmac2: dma-controller@e7310000 {
@ -1026,6 +1042,14 @@
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
<&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
<&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
<&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
<&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
<&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: iommu@e6740000 {
@ -1160,6 +1184,7 @@
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
iommus = <&ipmmu_ds0 16>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -2280,6 +2305,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 314>;
iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@ -2292,6 +2318,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 313>;
iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@ -2304,6 +2331,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 312>;
iommus = <&ipmmu_ds1 34>;
status = "disabled";
};
@ -2316,6 +2344,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 311>;
iommus = <&ipmmu_ds1 35>;
status = "disabled";
};

14
arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts
View File

@ -30,17 +30,3 @@
clock-names = "du.0", "du.1", "du.3",
"dclkin.0", "dclkin.1", "dclkin.3";
};
&pca9654 {
pcie-sata-switch-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-low; /* enable SATA by default */
line-name = "PCIE/SATA switch";
};
};
/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
&sata {
status = "okay";
};

2
arch/arm64/boot/dts/renesas/r8a77965-ulcb-kf.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3NULCB Kingfisher board
* Device Tree Source for the M3NULCB Kingfisher board with R-Car M3-N
*
* Copyright (C) 2018 Renesas Electronics Corp.
* Copyright (C) 2018 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board
* Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board with R-Car M3-N
*
* Copyright (C) 2018 Renesas Electronics Corp.
* Copyright (C) 2018 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77965.dtsi
View File

@ -14,6 +14,8 @@
#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
#define SOC_HAS_SATA
/ {
compatible = "renesas,r8a77965";
#address-cells = <2>;

2
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Eagle board
* Device Tree Source for the Eagle board with R-Car V3M
*
* Copyright (C) 2016-2017 Renesas Electronics Corp.
* Copyright (C) 2017 Cogent Embedded, Inc.

2
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Condor board
* Device Tree Source for the Condor board with R-Car V3H
*
* Copyright (C) 2018 Renesas Electronics Corp.
* Copyright (C) 2018 Cogent Embedded, Inc.

50
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the ebisu board
* Device Tree Source for the Ebisu board with R-Car E3
*
* Copyright (C) 2018 Renesas Electronics Corp.
*/
@ -8,6 +8,7 @@
/dts-v1/;
#include "r8a77990.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Renesas Ebisu board based on r8a77990";
@ -80,6 +81,42 @@
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&keys_pins>;
pinctrl-names = "default";
key-1 {
gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW4-1";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW4-2";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW4-3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW4-4";
wakeup-source;
debounce-interval = <20>;
};
};
lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_3p3v>;
@ -473,6 +510,12 @@
rohm,ddr-backup-power = <0x1>;
rohm,rstbmode-level;
};
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
};
&lvds0 {
@ -540,6 +583,11 @@
function = "intc_ex";
};
keys_pins: keys {
pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
bias-pull-up;
};
pwm3_pins: pwm3 {
groups = "pwm3_b";
function = "pwm3";

6
arch/arm64/boot/dts/renesas/r8a77990.dtsi
View File

@ -290,8 +290,10 @@
i2c_dvfs: i2c@e60b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a77990";
reg = <0 0xe60b0000 0 0x15>;
compatible = "renesas,iic-r8a77990",
"renesas,rcar-gen3-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;

169
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Draak board
* Device Tree Source for the Draak board with R-Car D3
*
* Copyright (C) 2016-2018 Renesas Electronics Corp.
* Copyright (C) 2017 Glider bvba
@ -9,6 +9,7 @@
/dts-v1/;
#include "r8a77995.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Renesas Draak board based on r8a77995";
@ -19,6 +20,16 @@
ethernet0 = &avb;
};
audio_clkout: audio-clkout {
/*
* This is same as <&rcar_sound 0>
* but needed to avoid cs2000/rcar_sound probe dead-lock
*/
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 50000>;
@ -67,6 +78,42 @@
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&keys_pins>;
pinctrl-names = "default";
key-1 {
gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW56-1";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW56-2";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW56-3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW56-4";
wakeup-source;
debounce-interval = <20>;
};
};
lvds-decoder {
compatible = "thine,thc63lvd1024";
vcc-supply = <&reg_3p3v>;
@ -124,6 +171,14 @@
regulator-always-on;
};
sound_card: sound {
compatible = "audio-graph-card";
dais = <&rsnd_port0 /* ak4613 */
/* HDMI is not yet supported */
>;
};
vga {
compatible = "vga-connector";
@ -161,6 +216,25 @@
#clock-cells = <0>;
clock-frequency = <74250000>;
};
x19_clk: x19 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
};
&audio_clk_b {
/*
* X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
* and R-Car Sound uses AUDIO_CLKB.
* Note is that schematic indicates VI4_FIELD conection only
* not AUDIO_CLKB at SoC page.
* And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
* SW60 should be 1-2.
*/
clock-frequency = <22579200>;
};
&avb {
@ -236,6 +310,28 @@
pinctrl-names = "default";
status = "okay";
ak4613: codec@10 {
compatible = "asahi-kasei,ak4613";
#sound-dai-cells = <0>;
reg = <0x10>;
clocks = <&rcar_sound 0>; /* audio_clkout */
asahi-kasei,in1-single-end;
asahi-kasei,in2-single-end;
asahi-kasei,out1-single-end;
asahi-kasei,out2-single-end;
asahi-kasei,out3-single-end;
asahi-kasei,out4-single-end;
asahi-kasei,out5-single-end;
asahi-kasei,out6-single-end;
port {
ak4613_endpoint: endpoint {
remote-endpoint = <&rsnd_for_ak4613>;
};
};
};
composite-in@20 {
compatible = "adi,adv7180cp";
reg = <0x20>;
@ -277,10 +373,6 @@
interrupt-parent = <&gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
/* Depends on LVDS */
max-clock = <135000000>;
min-vrefresh = <50>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
@ -342,6 +434,17 @@
};
};
cs2000: clk-multiplier@4f {
#clock-cells = <0>;
compatible = "cirrus,cs2000-cp";
reg = <0x4f>;
clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
clock-names = "clk_in", "ref_clk";
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24576000>; /* 1/1 divide */
};
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
@ -422,6 +525,11 @@
function = "i2c1";
};
keys_pins: keys {
pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
bias-pull-up;
};
pwm0_pins: pwm0 {
groups = "pwm0_c";
function = "pwm0";
@ -449,6 +557,17 @@
power-source = <1800>;
};
sound_pins: sound {
groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
function = "ssi";
};
sound_clk_pins: sound-clk {
groups = "audio_clk_a", "audio_clk_b",
"audio_clkout", "audio_clkout1";
function = "audio_clk";
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@ -474,6 +593,42 @@
status = "okay";
};
&rcar_sound {
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1 */
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
status = "okay";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&cs2000>, <&audio_clk_b>,
<&cpg CPG_CORE R8A77995_CLK_ZA2>;
ports {
rsnd_port0: port {
rsnd_for_ak4613: endpoint {
remote-endpoint = <&ak4613_endpoint>;
dai-format = "left_j";
bitclock-master = <&rsnd_for_ak4613>;
frame-master = <&rsnd_for_ak4613>;
playback = <&ssi3>, <&src5>, <&dvc0>;
capture = <&ssi4>, <&src6>, <&dvc1>;
};
};
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
@ -502,6 +657,10 @@
status = "okay";
};
&ssi4 {
shared-pin;
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";

158
arch/arm64/boot/dts/renesas/r8a77995.dtsi
View File

@ -15,6 +15,23 @@
#address-cells = <2>;
#size-cells = <2>;
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can {
compatible = "fixed-clock";
@ -1016,6 +1033,147 @@
status = "disabled";
};
rcar_sound: sound@ec500000 {
/*
* #sound-dai-cells is required
*
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
/*
* #clock-cells is required for audio_clkout0/1/2/3
*
* clkout : #clock-cells = <0>; <&rcar_sound>;
* clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
*/
compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>,
<&cpg CPG_CORE R8A77995_CLK_ZA2>;
clock-names = "ssi-all",
"ssi.4", "ssi.3",
"src.6", "src.5",
"mix.1", "mix.0",
"ctu.1", "ctu.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_i";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1011>, <&cpg 1012>;
reset-names = "ssi-all",
"ssi.4", "ssi.3";
status = "disabled";
rcar_sound,ctu {
ctu00: ctu-0 { };
ctu01: ctu-1 { };
ctu02: ctu-2 { };
ctu03: ctu-3 { };
ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
};
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
};
};
rcar_sound,mix {
mix0: mix-0 { };
mix1: mix-1 { };
};
rcar_sound,src {
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma0 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma0 0xb4>;
dma-names = "rx", "tx";
};
};
rcar_sound,ssi {
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma0 0x08>,
<&audma0 0x6f>, <&audma0 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma0 0x0a>,
<&audma0 0x71>, <&audma0 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
};
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a77995",
"renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
<&ipmmu_mp 2>, <&ipmmu_mp 3>,
<&ipmmu_mp 4>, <&ipmmu_mp 5>,
<&ipmmu_mp 6>, <&ipmmu_mp 7>,
<&ipmmu_mp 8>, <&ipmmu_mp 9>,
<&ipmmu_mp 10>, <&ipmmu_mp 11>,
<&ipmmu_mp 12>, <&ipmmu_mp 13>,
<&ipmmu_mp 14>, <&ipmmu_mp 15>;
};
ohci0: usb@ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;

2
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Falcon CPU and BreakOut boards
* Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/

26
arch/arm64/boot/dts/renesas/r8a779a0.dtsi
View File

@ -327,6 +327,19 @@
#power-domain-cells = <1>;
};
tsc: thermal@e6190000 {
compatible = "renesas,r8a779a0-thermal";
reg = <0 0xe6190000 0 0x200>,
<0 0xe6198000 0 0x200>,
<0 0xe61a0000 0 0x200>,
<0 0xe61a8000 0 0x200>,
<0 0xe61b0000 0 0x200>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 919>;
#thermal-sensor-cells = <1>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
@ -392,19 +405,6 @@
status = "disabled";
};
tsc: thermal@e6190000 {
compatible = "renesas,r8a779a0-thermal";
reg = <0 0xe6190000 0 0x200>,
<0 0xe6198000 0 0x200>,
<0 0xe61a0000 0 0x200>,
<0 0xe61a8000 0 0x200>,
<0 0xe61b0000 0 0x200>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 919>;
#thermal-sensor-cells = <1>;
};
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";

53
arch/arm64/boot/dts/renesas/r8a779m1-salvator-xs.dts Normal file
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@ -0,0 +1,53 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the Salvator-X 2nd version board with R-Car H3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77951-salvator-xs.dts
* Copyright (C) 2015-2017 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a779m1.dtsi"
#include "salvator-xs.dtsi"
/ {
model = "Renesas Salvator-X 2nd version board based on r8a779m1";
compatible = "renesas,salvator-xs", "renesas,r8a779m1",
"renesas,r8a7795";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
memory@500000000 {
device_type = "memory";
reg = <0x5 0x00000000 0x0 0x40000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x40000000>;
};
memory@700000000 {
device_type = "memory";
reg = <0x7 0x00000000 0x0 0x40000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
<&versaclock6 1>,
<&x21_clk>,
<&x22_clk>,
<&versaclock6 2>;
clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};

19
arch/arm64/boot/dts/renesas/r8a779m1-ulcb-kf.dts Normal file
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@ -0,0 +1,19 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the H3ULCB Kingfisher board with R-Car H3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77951-ulcb-kf.dts
* Copyright (C) 2017 Renesas Electronics Corp.
* Copyright (C) 2017 Cogent Embedded, Inc.
*/
#include "r8a779m1-ulcb.dts"
#include "ulcb-kf.dtsi"
/ {
model = "Renesas H3ULCB Kingfisher board based on r8a779m1";
compatible = "shimafuji,kingfisher", "renesas,h3ulcb",
"renesas,r8a779m1", "renesas,r8a7795";
};

54
arch/arm64/boot/dts/renesas/r8a779m1-ulcb.dts Normal file
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@ -0,0 +1,54 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) with R-Car H3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77951-ulcb.dts
*
* Copyright (C) 2016 Renesas Electronics Corp.
* Copyright (C) 2016 Cogent Embedded, Inc.
*/
/dts-v1/;
#include "r8a779m1.dtsi"
#include "ulcb.dtsi"
/ {
model = "Renesas H3ULCB board based on r8a779m1";
compatible = "renesas,h3ulcb", "renesas,r8a779m1", "renesas,r8a7795";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
memory@500000000 {
device_type = "memory";
reg = <0x5 0x00000000 0x0 0x40000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x40000000>;
};
memory@700000000 {
device_type = "memory";
reg = <0x7 0x00000000 0x0 0x40000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
<&versaclock5 1>,
<&versaclock5 3>,
<&versaclock5 4>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2", "du.3",
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};

12
arch/arm64/boot/dts/renesas/r8a779m1.dtsi Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the R-Car H3e-2G (R8A779M1) SoC
*
* Copyright (C) 2021 Glider bv
*/
#include "r8a77951.dtsi"
/ {
compatible = "renesas,r8a779m1", "renesas,r8a7795";
};

46
arch/arm64/boot/dts/renesas/r8a779m3-salvator-xs.dts Normal file
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@ -0,0 +1,46 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the Salvator-X 2nd version board with R-Car M3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77961-salvator-xs.dts
* Copyright (C) 2018 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a779m3.dtsi"
#include "salvator-xs.dtsi"
/ {
model = "Renesas Salvator-X 2nd version board based on r8a779m3";
compatible = "renesas,salvator-xs", "renesas,r8a779m3",
"renesas,r8a77961";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@480000000 {
device_type = "memory";
reg = <0x4 0x80000000 0x0 0x80000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x1 0x00000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock6 1>,
<&x21_clk>,
<&versaclock6 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};

18
arch/arm64/boot/dts/renesas/r8a779m3-ulcb-kf.dts Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the M3ULCB Kingfisher board with R-Car M3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77961-ulcb-kf.dts
* Copyright (C) 2020 Eugeniu Rosca <rosca.eugeniu@gmail.com>
*/
#include "r8a779m3-ulcb.dts"
#include "ulcb-kf.dtsi"
/ {
model = "Renesas M3ULCB Kingfisher board based on r8a779m3";
compatible = "shimafuji,kingfisher", "renesas,m3ulcb",
"renesas,r8a779m3", "renesas,r8a77961";
};

45
arch/arm64/boot/dts/renesas/r8a779m3-ulcb.dts Normal file
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@ -0,0 +1,45 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) with R-Car M3e-2G
*
* Copyright (C) 2021 Glider bv
*
* Based on r8a77961-ulcb.dts
* Copyright (C) 2020 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a779m3.dtsi"
#include "ulcb.dtsi"
/ {
model = "Renesas M3ULCB board based on r8a779m3";
compatible = "renesas,m3ulcb", "renesas,r8a779m3", "renesas,r8a77961";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@480000000 {
device_type = "memory";
reg = <0x4 0x80000000 0x0 0x80000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x1 0x00000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock5 1>,
<&versaclock5 3>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};

12
arch/arm64/boot/dts/renesas/r8a779m3.dtsi Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0 or MIT)
/*
* Device Tree Source for the R-Car M3e-2G (R8A779M3) SoC
*
* Copyright (C) 2021 Glider bv
*/
#include "r8a77961.dtsi"
/ {
compatible = "renesas,r8a779m3", "renesas,r8a77961";
};

80
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
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@ -89,6 +89,86 @@
status = "disabled";
};
i2c0: i2c@10058000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
reg = <0 0x10058000 0 0x400>;
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 348 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 349 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
clock-frequency = <100000>;
resets = <&cpg R9A07G044_I2C0_MRST>;
power-domains = <&cpg>;
status = "disabled";
};
i2c1: i2c@10058400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
reg = <0 0x10058400 0 0x400>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 356 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 357 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
clock-frequency = <100000>;
resets = <&cpg R9A07G044_I2C1_MRST>;
power-domains = <&cpg>;
status = "disabled";
};
i2c2: i2c@10058800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
reg = <0 0x10058800 0 0x400>;
interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
clock-frequency = <100000>;
resets = <&cpg R9A07G044_I2C2_MRST>;
power-domains = <&cpg>;
status = "disabled";
};
i2c3: i2c@10058c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
reg = <0 0x10058c00 0 0x400>;
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 372 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
clock-frequency = <100000>;
resets = <&cpg R9A07G044_I2C3_MRST>;
power-domains = <&cpg>;
status = "disabled";
};
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g044-cpg";
reg = <0 0x11010000 0 0x10000>;

76
arch/arm64/boot/dts/renesas/salvator-common.dtsi
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@ -202,7 +202,11 @@
label = "rcar-sound";
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1>; /* HDMI0 */
&rsnd_port1 /* HDMI0 */
#ifdef SOC_HAS_HDMI1
&rsnd_port2 /* HDMI1 */
#endif
>;
};
vbus0_usb2: regulator-vbus0-usb2 {
@ -422,6 +426,31 @@
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
#ifdef SOC_HAS_HDMI1
&hdmi1 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi1_out: endpoint {
remote-endpoint = <&hdmi1_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi1_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint2>;
};
};
};
};
&hdmi1_con {
remote-endpoint = <&rcar_dw_hdmi1_out>;
};
#endif /* SOC_HAS_HDMI1 */
&hscif1 {
pinctrl-0 = <&hscif1_pins>;
pinctrl-names = "default";
@ -818,6 +847,21 @@
playback = <&ssi2>;
};
};
#ifdef SOC_HAS_HDMI1
rsnd_port2: port@2 {
reg = <2>;
rsnd_endpoint2: endpoint {
remote-endpoint = <&dw_hdmi1_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint2>;
frame-master = <&rsnd_endpoint2>;
playback = <&ssi3>;
};
};
#endif /* SOC_HAS_HDMI1 */
};
};
@ -826,6 +870,12 @@
status = "okay";
};
#ifdef SOC_HAS_SATA
&sata {
status = "okay";
};
#endif /* SOC_HAS_SATA */
&scif1 {
pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default";
@ -973,3 +1023,27 @@
status = "okay";
};
#ifdef SOC_HAS_USB2_CH2
&ehci2 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&pfc {
usb2_pins: usb2 {
groups = "usb2";
function = "usb2";
};
};
&usb2_phy2 {
pinctrl-0 = <&usb2_pins>;
pinctrl-names = "default";
status = "okay";
};
#endif /* SOC_HAS_USB2_CH2 */

56
arch/arm64/boot/dts/renesas/salvator-xs.dtsi
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@ -27,3 +27,59 @@
clock-names = "xin";
};
};
#ifdef SOC_HAS_SATA
&pca9654 {
pcie-sata-switch-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-low; /* enable SATA by default */
line-name = "PCIE/SATA switch";
};
};
/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
#endif /* SOC_HAS_SATA */
#ifdef SOC_HAS_USB2_CH3
&ehci3 {
dr_mode = "otg";
status = "okay";
};
&hsusb3 {
dr_mode = "otg";
status = "okay";
};
&ohci3 {
dr_mode = "otg";
status = "okay";
};
&pfc {
/*
* - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
* (when SW31 is the default setting on Salvator-XS).
* - If SW31 is the default setting, you cannot use USB2.0 ch3 on
* r8a77951 with Salvator-XS.
* Hence the SW31 setting must be changed like 2) below.
* 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
* - Connect GP6_3[01] to ADV7842.
* 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
* - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
* - Connect GP6_{04,21} to ADV7842.
*/
usb2_ch3_pins: usb2_ch3 {
groups = "usb2_ch3";
function = "usb2_ch3";
};
};
&usb2_phy3 {
pinctrl-0 = <&usb2_ch3_pins>;
pinctrl-names = "default";
status = "okay";
};
#endif /* SOC_HAS_USB2_CH3 */