KVM: x86: Rename GPR accessors to make mode-aware variants the defaults
Append raw to the direct variants of kvm_register_read/write(), and drop the "l" from the mode-aware variants. I.e. make the mode-aware variants the default, and make the direct variants scary sounding so as to discourage use. Accessing the full 64-bit values irrespective of mode is rarely the desired behavior. Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210422022128.3464144-10-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -62,7 +62,12 @@ static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu,
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
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}
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}
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static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
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/*
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* The "raw" register helpers are only for cases where the full 64 bits of a
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* register are read/written irrespective of current vCPU mode. In other words,
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* odds are good you shouldn't be using the raw variants.
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*/
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static inline unsigned long kvm_register_read_raw(struct kvm_vcpu *vcpu, int reg)
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{
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{
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if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
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if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
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return 0;
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return 0;
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@ -73,8 +78,8 @@ static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
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return vcpu->arch.regs[reg];
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return vcpu->arch.regs[reg];
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}
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}
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static inline void kvm_register_write(struct kvm_vcpu *vcpu, int reg,
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static inline void kvm_register_write_raw(struct kvm_vcpu *vcpu, int reg,
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unsigned long val)
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unsigned long val)
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{
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{
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if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
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if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS))
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return;
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return;
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@ -85,22 +90,22 @@ static inline void kvm_register_write(struct kvm_vcpu *vcpu, int reg,
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static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
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static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
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{
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{
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return kvm_register_read(vcpu, VCPU_REGS_RIP);
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return kvm_register_read_raw(vcpu, VCPU_REGS_RIP);
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}
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}
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static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
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static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
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{
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{
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kvm_register_write(vcpu, VCPU_REGS_RIP, val);
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kvm_register_write_raw(vcpu, VCPU_REGS_RIP, val);
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}
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}
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static inline unsigned long kvm_rsp_read(struct kvm_vcpu *vcpu)
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static inline unsigned long kvm_rsp_read(struct kvm_vcpu *vcpu)
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{
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{
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return kvm_register_read(vcpu, VCPU_REGS_RSP);
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return kvm_register_read_raw(vcpu, VCPU_REGS_RSP);
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}
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}
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static inline void kvm_rsp_write(struct kvm_vcpu *vcpu, unsigned long val)
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static inline void kvm_rsp_write(struct kvm_vcpu *vcpu, unsigned long val)
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{
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{
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kvm_register_write(vcpu, VCPU_REGS_RSP, val);
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kvm_register_write_raw(vcpu, VCPU_REGS_RSP, val);
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}
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}
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static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
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static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
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@ -2457,7 +2457,7 @@ static int cr_interception(struct kvm_vcpu *vcpu)
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err = 0;
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err = 0;
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if (cr >= 16) { /* mov to cr */
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if (cr >= 16) { /* mov to cr */
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cr -= 16;
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cr -= 16;
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val = kvm_register_readl(vcpu, reg);
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val = kvm_register_read(vcpu, reg);
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trace_kvm_cr_write(cr, val);
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trace_kvm_cr_write(cr, val);
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switch (cr) {
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switch (cr) {
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case 0:
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case 0:
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@ -2503,7 +2503,7 @@ static int cr_interception(struct kvm_vcpu *vcpu)
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kvm_queue_exception(vcpu, UD_VECTOR);
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 1;
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return 1;
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}
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}
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kvm_register_writel(vcpu, reg, val);
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kvm_register_write(vcpu, reg, val);
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trace_kvm_cr_read(cr, val);
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trace_kvm_cr_read(cr, val);
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}
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}
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return kvm_complete_insn_gp(vcpu, err);
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return kvm_complete_insn_gp(vcpu, err);
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@ -2569,11 +2569,11 @@ static int dr_interception(struct kvm_vcpu *vcpu)
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dr = svm->vmcb->control.exit_code - SVM_EXIT_READ_DR0;
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dr = svm->vmcb->control.exit_code - SVM_EXIT_READ_DR0;
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if (dr >= 16) { /* mov to DRn */
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if (dr >= 16) { /* mov to DRn */
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dr -= 16;
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dr -= 16;
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val = kvm_register_readl(vcpu, reg);
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val = kvm_register_read(vcpu, reg);
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err = kvm_set_dr(vcpu, dr, val);
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err = kvm_set_dr(vcpu, dr, val);
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} else {
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} else {
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kvm_get_dr(vcpu, dr, &val);
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kvm_get_dr(vcpu, dr, &val);
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kvm_register_writel(vcpu, reg, val);
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kvm_register_write(vcpu, reg, val);
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}
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}
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return kvm_complete_insn_gp(vcpu, err);
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return kvm_complete_insn_gp(vcpu, err);
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@ -4619,9 +4619,9 @@ int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification,
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else if (addr_size == 0)
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else if (addr_size == 0)
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off = (gva_t)sign_extend64(off, 15);
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off = (gva_t)sign_extend64(off, 15);
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if (base_is_valid)
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if (base_is_valid)
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off += kvm_register_readl(vcpu, base_reg);
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off += kvm_register_read(vcpu, base_reg);
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if (index_is_valid)
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if (index_is_valid)
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off += kvm_register_readl(vcpu, index_reg) << scaling;
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off += kvm_register_read(vcpu, index_reg) << scaling;
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vmx_get_segment(vcpu, &s, seg_reg);
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vmx_get_segment(vcpu, &s, seg_reg);
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/*
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/*
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@ -5023,7 +5023,7 @@ static int handle_vmread(struct kvm_vcpu *vcpu)
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return nested_vmx_failInvalid(vcpu);
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return nested_vmx_failInvalid(vcpu);
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/* Decode instruction info and find the field to read */
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/* Decode instruction info and find the field to read */
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field = kvm_register_readl(vcpu, (((instr_info) >> 28) & 0xf));
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field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
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offset = vmcs_field_to_offset(field);
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offset = vmcs_field_to_offset(field);
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if (offset < 0)
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if (offset < 0)
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@ -5041,7 +5041,7 @@ static int handle_vmread(struct kvm_vcpu *vcpu)
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* on the guest's mode (32 or 64 bit), not on the given field's length.
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* on the guest's mode (32 or 64 bit), not on the given field's length.
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*/
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*/
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if (instr_info & BIT(10)) {
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if (instr_info & BIT(10)) {
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kvm_register_writel(vcpu, (((instr_info) >> 3) & 0xf), value);
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kvm_register_write(vcpu, (((instr_info) >> 3) & 0xf), value);
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} else {
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} else {
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len = is_64_bit_mode(vcpu) ? 8 : 4;
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len = is_64_bit_mode(vcpu) ? 8 : 4;
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if (get_vmx_mem_address(vcpu, exit_qualification,
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if (get_vmx_mem_address(vcpu, exit_qualification,
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@ -5115,7 +5115,7 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu)
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return nested_vmx_failInvalid(vcpu);
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return nested_vmx_failInvalid(vcpu);
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if (instr_info & BIT(10))
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if (instr_info & BIT(10))
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value = kvm_register_readl(vcpu, (((instr_info) >> 3) & 0xf));
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value = kvm_register_read(vcpu, (((instr_info) >> 3) & 0xf));
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else {
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else {
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len = is_64_bit_mode(vcpu) ? 8 : 4;
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len = is_64_bit_mode(vcpu) ? 8 : 4;
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if (get_vmx_mem_address(vcpu, exit_qualification,
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if (get_vmx_mem_address(vcpu, exit_qualification,
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@ -5126,7 +5126,7 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu)
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return kvm_handle_memory_failure(vcpu, r, &e);
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return kvm_handle_memory_failure(vcpu, r, &e);
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}
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}
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field = kvm_register_readl(vcpu, (((instr_info) >> 28) & 0xf));
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field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
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offset = vmcs_field_to_offset(field);
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offset = vmcs_field_to_offset(field);
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if (offset < 0)
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if (offset < 0)
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@ -5323,7 +5323,7 @@ static int handle_invept(struct kvm_vcpu *vcpu)
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return 1;
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return 1;
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
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type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf);
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types = (vmx->nested.msrs.ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6;
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types = (vmx->nested.msrs.ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6;
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@ -5403,7 +5403,7 @@ static int handle_invvpid(struct kvm_vcpu *vcpu)
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return 1;
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return 1;
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
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type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf);
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types = (vmx->nested.msrs.vpid_caps &
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types = (vmx->nested.msrs.vpid_caps &
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VMX_VPID_EXTENT_SUPPORTED_MASK) >> 8;
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VMX_VPID_EXTENT_SUPPORTED_MASK) >> 8;
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@ -5659,7 +5659,7 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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switch ((exit_qualification >> 4) & 3) {
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switch ((exit_qualification >> 4) & 3) {
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case 0: /* mov to cr */
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case 0: /* mov to cr */
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reg = (exit_qualification >> 8) & 15;
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reg = (exit_qualification >> 8) & 15;
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val = kvm_register_readl(vcpu, reg);
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val = kvm_register_read(vcpu, reg);
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switch (cr) {
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switch (cr) {
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case 0:
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case 0:
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if (vmcs12->cr0_guest_host_mask &
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if (vmcs12->cr0_guest_host_mask &
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@ -5745,7 +5745,7 @@ static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu,
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/* Decode instruction info and find the field to access */
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/* Decode instruction info and find the field to access */
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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field = kvm_register_readl(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
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field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
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/* Out-of-range fields always cause a VM exit from L2 to L1 */
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/* Out-of-range fields always cause a VM exit from L2 to L1 */
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if (field >> 15)
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if (field >> 15)
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@ -5079,7 +5079,7 @@ static int handle_cr(struct kvm_vcpu *vcpu)
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reg = (exit_qualification >> 8) & 15;
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reg = (exit_qualification >> 8) & 15;
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switch ((exit_qualification >> 4) & 3) {
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switch ((exit_qualification >> 4) & 3) {
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case 0: /* mov to cr */
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case 0: /* mov to cr */
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val = kvm_register_readl(vcpu, reg);
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val = kvm_register_read(vcpu, reg);
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trace_kvm_cr_write(cr, val);
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trace_kvm_cr_write(cr, val);
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switch (cr) {
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switch (cr) {
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case 0:
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case 0:
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@ -5121,12 +5121,12 @@ static int handle_cr(struct kvm_vcpu *vcpu)
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case 3:
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case 3:
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WARN_ON_ONCE(enable_unrestricted_guest);
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WARN_ON_ONCE(enable_unrestricted_guest);
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val = kvm_read_cr3(vcpu);
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val = kvm_read_cr3(vcpu);
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kvm_register_writel(vcpu, reg, val);
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kvm_register_write(vcpu, reg, val);
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trace_kvm_cr_read(cr, val);
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trace_kvm_cr_read(cr, val);
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return kvm_skip_emulated_instruction(vcpu);
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return kvm_skip_emulated_instruction(vcpu);
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case 8:
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case 8:
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val = kvm_get_cr8(vcpu);
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val = kvm_get_cr8(vcpu);
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kvm_register_writel(vcpu, reg, val);
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kvm_register_write(vcpu, reg, val);
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trace_kvm_cr_read(cr, val);
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trace_kvm_cr_read(cr, val);
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return kvm_skip_emulated_instruction(vcpu);
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return kvm_skip_emulated_instruction(vcpu);
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}
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}
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@ -5199,10 +5199,10 @@ static int handle_dr(struct kvm_vcpu *vcpu)
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unsigned long val;
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unsigned long val;
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kvm_get_dr(vcpu, dr, &val);
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kvm_get_dr(vcpu, dr, &val);
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kvm_register_writel(vcpu, reg, val);
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kvm_register_write(vcpu, reg, val);
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err = 0;
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err = 0;
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} else {
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} else {
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err = kvm_set_dr(vcpu, dr, kvm_register_readl(vcpu, reg));
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err = kvm_set_dr(vcpu, dr, kvm_register_read(vcpu, reg));
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}
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}
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out:
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out:
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@ -5554,7 +5554,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu)
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}
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}
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
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type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
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type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf);
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if (type > 3) {
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if (type > 3) {
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kvm_inject_gp(vcpu, 0);
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kvm_inject_gp(vcpu, 0);
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@ -7016,12 +7016,12 @@ static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
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static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
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static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
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{
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{
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return kvm_register_read(emul_to_vcpu(ctxt), reg);
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return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
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}
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}
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static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
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static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
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{
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{
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kvm_register_write(emul_to_vcpu(ctxt), reg, val);
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kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
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}
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}
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static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
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static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
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@ -8701,7 +8701,7 @@ static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
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put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
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put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++)
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put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
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put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
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kvm_get_dr(vcpu, 6, &val);
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kvm_get_dr(vcpu, 6, &val);
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put_smstate(u32, buf, 0x7fcc, (u32)val);
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put_smstate(u32, buf, 0x7fcc, (u32)val);
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@ -8747,7 +8747,7 @@ static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
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int i;
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int i;
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for (i = 0; i < 16; i++)
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for (i = 0; i < 16; i++)
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put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
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put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
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put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
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put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
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put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
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put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
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@ -232,19 +232,19 @@ static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
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return false;
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return false;
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}
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}
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static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu, int reg)
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static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
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{
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{
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unsigned long val = kvm_register_read(vcpu, reg);
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unsigned long val = kvm_register_read_raw(vcpu, reg);
|
||||||
|
|
||||||
return is_64_bit_mode(vcpu) ? val : (u32)val;
|
return is_64_bit_mode(vcpu) ? val : (u32)val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
|
static inline void kvm_register_write(struct kvm_vcpu *vcpu,
|
||||||
int reg, unsigned long val)
|
int reg, unsigned long val)
|
||||||
{
|
{
|
||||||
if (!is_64_bit_mode(vcpu))
|
if (!is_64_bit_mode(vcpu))
|
||||||
val = (u32)val;
|
val = (u32)val;
|
||||||
return kvm_register_write(vcpu, reg, val);
|
return kvm_register_write_raw(vcpu, reg, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
|
static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
|
||||||
|
@ -673,7 +673,7 @@ int kvm_xen_hypercall(struct kvm_vcpu *vcpu)
|
|||||||
bool longmode;
|
bool longmode;
|
||||||
u64 input, params[6];
|
u64 input, params[6];
|
||||||
|
|
||||||
input = (u64)kvm_register_readl(vcpu, VCPU_REGS_RAX);
|
input = (u64)kvm_register_read(vcpu, VCPU_REGS_RAX);
|
||||||
|
|
||||||
/* Hyper-V hypercalls get bit 31 set in EAX */
|
/* Hyper-V hypercalls get bit 31 set in EAX */
|
||||||
if ((input & 0x80000000) &&
|
if ((input & 0x80000000) &&
|
||||||
|
Loading…
Reference in New Issue
Block a user