net: filter: Just In Time compiler for sparc
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
parent
f4f9f6e75d
commit
2809a2087c
@ -30,6 +30,7 @@ config SPARC
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select USE_GENERIC_SMP_HELPERS if SMP
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select GENERIC_PCI_IOMAP
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select HAVE_NMI_WATCHDOG if SPARC64
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select HAVE_BPF_JIT
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config SPARC32
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def_bool !64BIT
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@ -66,6 +66,7 @@ head-y += arch/sparc/kernel/init_task.o
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core-y += arch/sparc/kernel/
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core-y += arch/sparc/mm/ arch/sparc/math-emu/
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core-y += arch/sparc/net/
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libs-y += arch/sparc/prom/
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libs-y += arch/sparc/lib/
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4
arch/sparc/net/Makefile
Normal file
4
arch/sparc/net/Makefile
Normal file
@ -0,0 +1,4 @@
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#
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# Arch-specific network modules
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#
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obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o
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52
arch/sparc/net/bpf_jit.h
Normal file
52
arch/sparc/net/bpf_jit.h
Normal file
@ -0,0 +1,52 @@
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#ifndef _BPF_JIT_H
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#define _BPF_JIT_H
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/* Conventions:
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* %g1 : temporary
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* %g2 : Secondary temporary used by SKB data helper stubs.
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* %o0 : pointer to skb (first argument given to JIT function)
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* %o1 : BPF A accumulator
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* %o2 : BPF X accumulator
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* %o3 : Holds saved %o7 so we can call helper functions without needing
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* to allocate a register window.
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* %o4 : skb->data
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* %o5 : skb->len - skb->data_len
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*/
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#ifndef __ASSEMBLER__
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#define G0 0x00
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#define G1 0x01
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#define G3 0x03
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#define G6 0x06
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#define O0 0x08
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#define O1 0x09
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#define O2 0x0a
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#define O3 0x0b
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#define O4 0x0c
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#define O5 0x0d
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#define SP 0x0e
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#define O7 0x0f
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#define FP 0x1e
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#define r_SKB O0
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#define r_A O1
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#define r_X O2
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#define r_saved_O7 O3
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#define r_HEADLEN O4
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#define r_SKB_DATA O5
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#define r_TMP G1
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#define r_TMP2 G2
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#define r_OFF G3
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#else
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#define r_SKB %o0
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#define r_A %o1
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#define r_X %o2
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#define r_saved_O7 %o3
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#define r_HEADLEN %o4
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#define r_SKB_DATA %o5
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#define r_TMP %g1
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#define r_TMP2 %g2
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#define r_OFF %g3
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#endif
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#endif /* _BPF_JIT_H */
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199
arch/sparc/net/bpf_jit_asm.S
Normal file
199
arch/sparc/net/bpf_jit_asm.S
Normal file
@ -0,0 +1,199 @@
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#include <asm/ptrace.h>
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#include "bpf_jit.h"
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#ifdef CONFIG_SPARC64
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#define SAVE_SZ 176
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#define SCRATCH_OFF STACK_BIAS + 128
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#define BE_PTR(label) be,pn %xcc, label
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#else
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#define SAVE_SZ 96
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#define SCRATCH_OFF 72
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#define BE_PTR(label) be label
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#endif
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#define SKF_MAX_NEG_OFF (-0x200000) /* SKF_LL_OFF from filter.h */
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.text
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.globl bpf_jit_load_word
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bpf_jit_load_word:
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cmp r_OFF, 0
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bl bpf_slow_path_word_neg
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nop
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.globl bpf_jit_load_word_positive_offset
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bpf_jit_load_word_positive_offset:
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sub r_HEADLEN, r_OFF, r_TMP
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cmp r_TMP, 3
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ble bpf_slow_path_word
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add r_SKB_DATA, r_OFF, r_TMP
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andcc r_TMP, 3, %g0
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bne load_word_unaligned
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nop
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retl
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ld [r_SKB_DATA + r_OFF], r_A
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load_word_unaligned:
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ldub [r_TMP + 0x0], r_OFF
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ldub [r_TMP + 0x1], r_TMP2
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sll r_OFF, 8, r_OFF
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or r_OFF, r_TMP2, r_OFF
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ldub [r_TMP + 0x2], r_TMP2
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sll r_OFF, 8, r_OFF
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or r_OFF, r_TMP2, r_OFF
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ldub [r_TMP + 0x3], r_TMP2
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sll r_OFF, 8, r_OFF
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retl
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or r_OFF, r_TMP2, r_A
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.globl bpf_jit_load_half
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bpf_jit_load_half:
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cmp r_OFF, 0
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bl bpf_slow_path_half_neg
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nop
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.globl bpf_jit_load_half_positive_offset
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bpf_jit_load_half_positive_offset:
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sub r_HEADLEN, r_OFF, r_TMP
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cmp r_TMP, 1
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ble bpf_slow_path_half
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add r_SKB_DATA, r_OFF, r_TMP
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andcc r_TMP, 1, %g0
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bne load_half_unaligned
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nop
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retl
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lduh [r_SKB_DATA + r_OFF], r_A
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load_half_unaligned:
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ldub [r_TMP + 0x0], r_OFF
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ldub [r_TMP + 0x1], r_TMP2
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sll r_OFF, 8, r_OFF
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retl
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or r_OFF, r_TMP2, r_A
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.globl bpf_jit_load_byte
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bpf_jit_load_byte:
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cmp r_OFF, 0
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bl bpf_slow_path_byte_neg
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nop
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.globl bpf_jit_load_byte_positive_offset
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bpf_jit_load_byte_positive_offset:
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cmp r_OFF, r_HEADLEN
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bge bpf_slow_path_byte
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nop
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retl
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ldub [r_SKB_DATA + r_OFF], r_A
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.globl bpf_jit_load_byte_msh
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bpf_jit_load_byte_msh:
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cmp r_OFF, 0
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bl bpf_slow_path_byte_msh_neg
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nop
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.globl bpf_jit_load_byte_msh_positive_offset
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bpf_jit_load_byte_msh_positive_offset:
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cmp r_OFF, r_HEADLEN
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bge bpf_slow_path_byte_msh
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nop
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ldub [r_SKB_DATA + r_OFF], r_OFF
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and r_OFF, 0xf, r_OFF
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retl
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sll r_OFF, 2, r_X
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#define bpf_slow_path_common(LEN) \
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save %sp, -SAVE_SZ, %sp; \
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mov %i0, %o0; \
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mov r_OFF, %o1; \
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add %fp, SCRATCH_OFF, %o2; \
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call skb_copy_bits; \
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mov (LEN), %o3; \
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cmp %o0, 0; \
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restore;
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bpf_slow_path_word:
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bpf_slow_path_common(4)
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bl bpf_error
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ld [%sp + SCRATCH_OFF], r_A
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retl
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nop
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bpf_slow_path_half:
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bpf_slow_path_common(2)
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bl bpf_error
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lduh [%sp + SCRATCH_OFF], r_A
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retl
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nop
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bpf_slow_path_byte:
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bpf_slow_path_common(1)
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bl bpf_error
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ldub [%sp + SCRATCH_OFF], r_A
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retl
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nop
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bpf_slow_path_byte_msh:
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bpf_slow_path_common(1)
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bl bpf_error
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ldub [%sp + SCRATCH_OFF], r_A
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and r_OFF, 0xf, r_OFF
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retl
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sll r_OFF, 2, r_X
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#define bpf_negative_common(LEN) \
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save %sp, -SAVE_SZ, %sp; \
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mov %i0, %o0; \
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mov r_OFF, %o1; \
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call bpf_internal_load_pointer_neg_helper; \
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mov (LEN), %o2; \
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mov %o0, r_TMP; \
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cmp %o0, 0; \
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BE_PTR(bpf_error); \
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restore;
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bpf_slow_path_word_neg:
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sethi %hi(SKF_MAX_NEG_OFF), r_TMP
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cmp r_OFF, r_TMP
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bl bpf_error
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nop
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.globl bpf_jit_load_word_negative_offset
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bpf_jit_load_word_negative_offset:
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bpf_negative_common(4)
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andcc r_TMP, 3, %g0
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bne load_word_unaligned
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nop
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retl
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ld [r_TMP], r_A
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bpf_slow_path_half_neg:
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sethi %hi(SKF_MAX_NEG_OFF), r_TMP
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cmp r_OFF, r_TMP
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bl bpf_error
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nop
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.globl bpf_jit_load_half_negative_offset
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bpf_jit_load_half_negative_offset:
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bpf_negative_common(2)
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andcc r_TMP, 1, %g0
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bne load_half_unaligned
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nop
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retl
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lduh [r_TMP], r_A
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bpf_slow_path_byte_neg:
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sethi %hi(SKF_MAX_NEG_OFF), r_TMP
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cmp r_OFF, r_TMP
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bl bpf_error
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nop
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.globl bpf_jit_load_byte_negative_offset
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bpf_jit_load_byte_negative_offset:
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bpf_negative_common(1)
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retl
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ldub [r_TMP], r_A
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bpf_slow_path_byte_msh_neg:
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sethi %hi(SKF_MAX_NEG_OFF), r_TMP
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cmp r_OFF, r_TMP
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bl bpf_error
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nop
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.globl bpf_jit_load_byte_msh_negative_offset
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bpf_jit_load_byte_msh_negative_offset:
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bpf_negative_common(1)
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ldub [r_TMP], r_OFF
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and r_OFF, 0xf, r_OFF
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retl
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sll r_OFF, 2, r_X
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bpf_error:
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jmpl r_saved_O7 + 8, %g0
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clr %o0
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785
arch/sparc/net/bpf_jit_comp.c
Normal file
785
arch/sparc/net/bpf_jit_comp.c
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@ -0,0 +1,785 @@
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#include <linux/moduleloader.h>
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#include <linux/workqueue.h>
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#include <linux/netdevice.h>
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#include <linux/filter.h>
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#include <linux/cache.h>
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#include <asm/cacheflush.h>
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#include <asm/ptrace.h>
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#include "bpf_jit.h"
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int bpf_jit_enable __read_mostly;
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/* assembly code in arch/sparc/net/bpf_jit_asm.S */
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extern u32 bpf_jit_load_word[];
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extern u32 bpf_jit_load_half[];
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extern u32 bpf_jit_load_byte[];
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extern u32 bpf_jit_load_byte_msh[];
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extern u32 bpf_jit_load_word_positive_offset[];
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extern u32 bpf_jit_load_half_positive_offset[];
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extern u32 bpf_jit_load_byte_positive_offset[];
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extern u32 bpf_jit_load_byte_msh_positive_offset[];
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extern u32 bpf_jit_load_word_negative_offset[];
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extern u32 bpf_jit_load_half_negative_offset[];
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extern u32 bpf_jit_load_byte_negative_offset[];
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extern u32 bpf_jit_load_byte_msh_negative_offset[];
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static inline bool is_simm13(unsigned int value)
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{
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return value + 0x1000 < 0x2000;
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}
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static void bpf_flush_icache(void *start_, void *end_)
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{
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#ifdef CONFIG_SPARC64
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/* Cheetah's I-cache is fully coherent. */
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if (tlb_type == spitfire) {
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unsigned long start = (unsigned long) start_;
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unsigned long end = (unsigned long) end_;
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start &= ~7UL;
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end = (end + 7UL) & ~7UL;
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while (start < end) {
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flushi(start);
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start += 32;
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}
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}
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#endif
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}
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#define SEEN_DATAREF 1 /* might call external helpers */
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#define SEEN_XREG 2 /* ebx is used */
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#define SEEN_MEM 4 /* use mem[] for temporary storage */
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#define S13(X) ((X) & 0x1fff)
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#define IMMED 0x00002000
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#define RD(X) ((X) << 25)
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#define RS1(X) ((X) << 14)
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#define RS2(X) ((X))
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#define OP(X) ((X) << 30)
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#define OP2(X) ((X) << 22)
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#define OP3(X) ((X) << 19)
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#define COND(X) ((X) << 25)
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#define F1(X) OP(X)
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#define F2(X, Y) (OP(X) | OP2(Y))
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#define F3(X, Y) (OP(X) | OP3(Y))
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#define CONDN COND (0x0)
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#define CONDE COND (0x1)
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#define CONDLE COND (0x2)
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#define CONDL COND (0x3)
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#define CONDLEU COND (0x4)
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#define CONDCS COND (0x5)
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#define CONDNEG COND (0x6)
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#define CONDVC COND (0x7)
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#define CONDA COND (0x8)
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#define CONDNE COND (0x9)
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#define CONDG COND (0xa)
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#define CONDGE COND (0xb)
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#define CONDGU COND (0xc)
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#define CONDCC COND (0xd)
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#define CONDPOS COND (0xe)
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#define CONDVS COND (0xf)
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#define CONDGEU CONDCC
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#define CONDLU CONDCS
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#define WDISP22(X) (((X) >> 2) & 0x3fffff)
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#define BA (F2(0, 2) | CONDA)
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#define BGU (F2(0, 2) | CONDGU)
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#define BLEU (F2(0, 2) | CONDLEU)
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#define BGEU (F2(0, 2) | CONDGEU)
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#define BLU (F2(0, 2) | CONDLU)
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#define BE (F2(0, 2) | CONDE)
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#define BNE (F2(0, 2) | CONDNE)
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#ifdef CONFIG_SPARC64
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#define BNE_PTR (F2(0, 1) | CONDNE | (2 << 20))
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#else
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#define BNE_PTR BNE
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#endif
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#define SETHI(K, REG) \
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(F2(0, 0x4) | RD(REG) | (((K) >> 10) & 0x3fffff))
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#define OR_LO(K, REG) \
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(F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
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#define ADD F3(2, 0x00)
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#define AND F3(2, 0x01)
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#define ANDCC F3(2, 0x11)
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#define OR F3(2, 0x02)
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#define SUB F3(2, 0x04)
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#define SUBCC F3(2, 0x14)
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#define MUL F3(2, 0x0a) /* umul */
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#define DIV F3(2, 0x0e) /* udiv */
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#define SLL F3(2, 0x25)
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#define SRL F3(2, 0x26)
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#define JMPL F3(2, 0x38)
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#define CALL F1(1)
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#define BR F2(0, 0x01)
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#define RD_Y F3(2, 0x28)
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#define WR_Y F3(2, 0x30)
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#define LD32 F3(3, 0x00)
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#define LD8 F3(3, 0x01)
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#define LD16 F3(3, 0x02)
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#define LD64 F3(3, 0x0b)
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#define ST32 F3(3, 0x04)
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#ifdef CONFIG_SPARC64
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#define LDPTR LD64
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#define BASE_STACKFRAME 176
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#else
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#define LDPTR LD32
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#define BASE_STACKFRAME 96
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#endif
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#define LD32I (LD32 | IMMED)
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#define LD8I (LD8 | IMMED)
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#define LD16I (LD16 | IMMED)
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#define LD64I (LD64 | IMMED)
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#define LDPTRI (LDPTR | IMMED)
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#define ST32I (ST32 | IMMED)
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#define emit_nop() \
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do { \
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*prog++ = SETHI(0, G0); \
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} while (0)
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#define emit_neg() \
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do { /* sub %g0, r_A, r_A */ \
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*prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
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} while (0)
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#define emit_reg_move(FROM, TO) \
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do { /* or %g0, FROM, TO */ \
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*prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
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} while (0)
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|
||||
#define emit_clear(REG) \
|
||||
do { /* or %g0, %g0, REG */ \
|
||||
*prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
|
||||
} while (0)
|
||||
|
||||
#define emit_set_const(K, REG) \
|
||||
do { /* sethi %hi(K), REG */ \
|
||||
*prog++ = SETHI(K, REG); \
|
||||
/* or REG, %lo(K), REG */ \
|
||||
*prog++ = OR_LO(K, REG); \
|
||||
} while (0)
|
||||
|
||||
/* Emit
|
||||
*
|
||||
* OP r_A, r_X, r_A
|
||||
*/
|
||||
#define emit_alu_X(OPCODE) \
|
||||
do { \
|
||||
seen |= SEEN_XREG; \
|
||||
*prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
|
||||
} while (0)
|
||||
|
||||
/* Emit either:
|
||||
*
|
||||
* OP r_A, K, r_A
|
||||
*
|
||||
* or
|
||||
*
|
||||
* sethi %hi(K), r_TMP
|
||||
* or r_TMP, %lo(K), r_TMP
|
||||
* OP r_A, r_TMP, r_A
|
||||
*
|
||||
* depending upon whether K fits in a signed 13-bit
|
||||
* immediate instruction field. Emit nothing if K
|
||||
* is zero.
|
||||
*/
|
||||
#define emit_alu_K(OPCODE, K) \
|
||||
do { \
|
||||
if (K) { \
|
||||
unsigned int _insn = OPCODE; \
|
||||
_insn |= RS1(r_A) | RD(r_A); \
|
||||
if (is_simm13(K)) { \
|
||||
*prog++ = _insn | IMMED | S13(K); \
|
||||
} else { \
|
||||
emit_set_const(K, r_TMP); \
|
||||
*prog++ = _insn | RS2(r_TMP); \
|
||||
} \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define emit_loadimm(K, DEST) \
|
||||
do { \
|
||||
if (is_simm13(K)) { \
|
||||
/* or %g0, K, DEST */ \
|
||||
*prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST); \
|
||||
} else { \
|
||||
emit_set_const(K, DEST); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define emit_loadptr(BASE, STRUCT, FIELD, DEST) \
|
||||
do { unsigned int _off = offsetof(STRUCT, FIELD); \
|
||||
BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(void *)); \
|
||||
*prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
|
||||
} while(0)
|
||||
|
||||
#define emit_load32(BASE, STRUCT, FIELD, DEST) \
|
||||
do { unsigned int _off = offsetof(STRUCT, FIELD); \
|
||||
BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u32)); \
|
||||
*prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
|
||||
} while(0)
|
||||
|
||||
#define emit_load16(BASE, STRUCT, FIELD, DEST) \
|
||||
do { unsigned int _off = offsetof(STRUCT, FIELD); \
|
||||
BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u16)); \
|
||||
*prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \
|
||||
} while(0)
|
||||
|
||||
#define __emit_load8(BASE, STRUCT, FIELD, DEST) \
|
||||
do { unsigned int _off = offsetof(STRUCT, FIELD); \
|
||||
*prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \
|
||||
} while(0)
|
||||
|
||||
#define emit_load8(BASE, STRUCT, FIELD, DEST) \
|
||||
do { BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u8)); \
|
||||
__emit_load8(BASE, STRUCT, FIELD, DEST); \
|
||||
} while(0)
|
||||
|
||||
#define emit_ldmem(OFF, DEST) \
|
||||
do { *prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(DEST); \
|
||||
} while(0)
|
||||
|
||||
#define emit_stmem(OFF, SRC) \
|
||||
do { *prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(SRC); \
|
||||
} while(0)
|
||||
|
||||
#define cpu_off offsetof(struct thread_info, cpu)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#ifdef CONFIG_SPARC64
|
||||
#define emit_load_cpu(REG) \
|
||||
emit_load16(G6, struct thread_info, cpu, REG)
|
||||
#else
|
||||
#define emit_load_cpu(REG) \
|
||||
emit_load32(G6, struct thread_info, cpu, REG)
|
||||
#endif
|
||||
#else
|
||||
#define emit_load_cpu(REG) emit_clear(REG)
|
||||
#endif
|
||||
|
||||
#define emit_skb_loadptr(FIELD, DEST) \
|
||||
emit_loadptr(r_SKB, struct sk_buff, FIELD, DEST)
|
||||
#define emit_skb_load32(FIELD, DEST) \
|
||||
emit_load32(r_SKB, struct sk_buff, FIELD, DEST)
|
||||
#define emit_skb_load16(FIELD, DEST) \
|
||||
emit_load16(r_SKB, struct sk_buff, FIELD, DEST)
|
||||
#define __emit_skb_load8(FIELD, DEST) \
|
||||
__emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
|
||||
#define emit_skb_load8(FIELD, DEST) \
|
||||
emit_load8(r_SKB, struct sk_buff, FIELD, DEST)
|
||||
|
||||
#define emit_jmpl(BASE, IMM_OFF, LREG) \
|
||||
*prog++ = (JMPL | IMMED | RS1(BASE) | S13(IMM_OFF) | RD(LREG))
|
||||
|
||||
#define emit_call(FUNC) \
|
||||
do { void *_here = image + addrs[i] - 8; \
|
||||
unsigned int _off = (void *)(FUNC) - _here; \
|
||||
*prog++ = CALL | (((_off) >> 2) & 0x3fffffff); \
|
||||
emit_nop(); \
|
||||
} while (0)
|
||||
|
||||
#define emit_branch(BR_OPC, DEST) \
|
||||
do { unsigned int _here = addrs[i] - 8; \
|
||||
*prog++ = BR_OPC | WDISP22((DEST) - _here); \
|
||||
} while(0)
|
||||
|
||||
#define emit_branch_off(BR_OPC, OFF) \
|
||||
do { *prog++ = BR_OPC | WDISP22(OFF); \
|
||||
} while(0)
|
||||
|
||||
#define emit_jump(DEST) emit_branch(BA, DEST)
|
||||
|
||||
#define emit_read_y(REG) *prog++ = RD_Y | RD(REG);
|
||||
#define emit_write_y(REG) *prog++ = WR_Y | IMMED | RS1(REG) | S13(0);
|
||||
|
||||
#define emit_cmp(R1, R2) \
|
||||
*prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
|
||||
|
||||
#define emit_cmpi(R1, IMM) \
|
||||
*prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
|
||||
|
||||
#define emit_btst(R1, R2) \
|
||||
*prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
|
||||
|
||||
#define emit_btsti(R1, IMM) \
|
||||
*prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
|
||||
|
||||
#define emit_sub(R1, R2, R3) \
|
||||
*prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
|
||||
|
||||
#define emit_subi(R1, IMM, R3) \
|
||||
*prog++ = (SUB | IMMED | RS1(R1) | S13(IMM) | RD(R3))
|
||||
|
||||
#define emit_add(R1, R2, R3) \
|
||||
*prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
|
||||
|
||||
#define emit_addi(R1, IMM, R3) \
|
||||
*prog++ = (ADD | IMMED | RS1(R1) | S13(IMM) | RD(R3))
|
||||
|
||||
#define emit_alloc_stack(SZ) \
|
||||
*prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))
|
||||
|
||||
#define emit_release_stack(SZ) \
|
||||
*prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))
|
||||
|
||||
void bpf_jit_compile(struct sk_filter *fp)
|
||||
{
|
||||
unsigned int cleanup_addr, proglen, oldproglen = 0;
|
||||
u32 temp[8], *prog, *func, seen = 0, pass;
|
||||
const struct sock_filter *filter = fp->insns;
|
||||
int i, flen = fp->len, pc_ret0 = -1;
|
||||
unsigned int *addrs;
|
||||
void *image;
|
||||
|
||||
if (!bpf_jit_enable)
|
||||
return;
|
||||
|
||||
addrs = kmalloc(flen * sizeof(*addrs), GFP_KERNEL);
|
||||
if (addrs == NULL)
|
||||
return;
|
||||
|
||||
/* Before first pass, make a rough estimation of addrs[]
|
||||
* each bpf instruction is translated to less than 64 bytes
|
||||
*/
|
||||
for (proglen = 0, i = 0; i < flen; i++) {
|
||||
proglen += 64;
|
||||
addrs[i] = proglen;
|
||||
}
|
||||
cleanup_addr = proglen; /* epilogue address */
|
||||
image = NULL;
|
||||
for (pass = 0; pass < 10; pass++) {
|
||||
u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;
|
||||
|
||||
/* no prologue/epilogue for trivial filters (RET something) */
|
||||
proglen = 0;
|
||||
prog = temp;
|
||||
|
||||
/* Prologue */
|
||||
if (seen_or_pass0) {
|
||||
if (seen_or_pass0 & SEEN_MEM) {
|
||||
unsigned int sz = BASE_STACKFRAME;
|
||||
sz += BPF_MEMWORDS * sizeof(u32);
|
||||
emit_alloc_stack(sz);
|
||||
}
|
||||
|
||||
/* Make sure we dont leek kernel memory. */
|
||||
if (seen_or_pass0 & SEEN_XREG)
|
||||
emit_clear(r_X);
|
||||
|
||||
/* If this filter needs to access skb data,
|
||||
* load %o4 and %o4 with:
|
||||
* %o4 = skb->len - skb->data_len
|
||||
* %o5 = skb->data
|
||||
* And also back up %o7 into r_saved_O7 so we can
|
||||
* invoke the stubs using 'call'.
|
||||
*/
|
||||
if (seen_or_pass0 & SEEN_DATAREF) {
|
||||
emit_load32(r_SKB, struct sk_buff, len, r_HEADLEN);
|
||||
emit_load32(r_SKB, struct sk_buff, data_len, r_TMP);
|
||||
emit_sub(r_HEADLEN, r_TMP, r_HEADLEN);
|
||||
emit_loadptr(r_SKB, struct sk_buff, data, r_SKB_DATA);
|
||||
}
|
||||
}
|
||||
emit_reg_move(O7, r_saved_O7);
|
||||
|
||||
switch (filter[0].code) {
|
||||
case BPF_S_RET_K:
|
||||
case BPF_S_LD_W_LEN:
|
||||
case BPF_S_ANC_PROTOCOL:
|
||||
case BPF_S_ANC_PKTTYPE:
|
||||
case BPF_S_ANC_IFINDEX:
|
||||
case BPF_S_ANC_MARK:
|
||||
case BPF_S_ANC_RXHASH:
|
||||
case BPF_S_ANC_CPU:
|
||||
case BPF_S_ANC_QUEUE:
|
||||
case BPF_S_LD_W_ABS:
|
||||
case BPF_S_LD_H_ABS:
|
||||
case BPF_S_LD_B_ABS:
|
||||
/* The first instruction sets the A register (or is
|
||||
* a "RET 'constant'")
|
||||
*/
|
||||
break;
|
||||
default:
|
||||
/* Make sure we dont leak kernel information to the
|
||||
* user.
|
||||
*/
|
||||
emit_clear(r_A); /* A = 0 */
|
||||
}
|
||||
|
||||
for (i = 0; i < flen; i++) {
|
||||
unsigned int K = filter[i].k;
|
||||
unsigned int t_offset;
|
||||
unsigned int f_offset;
|
||||
u32 t_op, f_op;
|
||||
int ilen;
|
||||
|
||||
switch (filter[i].code) {
|
||||
case BPF_S_ALU_ADD_X: /* A += X; */
|
||||
emit_alu_X(ADD);
|
||||
break;
|
||||
case BPF_S_ALU_ADD_K: /* A += K; */
|
||||
emit_alu_K(ADD, K);
|
||||
break;
|
||||
case BPF_S_ALU_SUB_X: /* A -= X; */
|
||||
emit_alu_X(SUB);
|
||||
break;
|
||||
case BPF_S_ALU_SUB_K: /* A -= K */
|
||||
emit_alu_K(SUB, K);
|
||||
break;
|
||||
case BPF_S_ALU_AND_X: /* A &= X */
|
||||
emit_alu_X(AND);
|
||||
break;
|
||||
case BPF_S_ALU_AND_K: /* A &= K */
|
||||
emit_alu_K(AND, K);
|
||||
break;
|
||||
case BPF_S_ALU_OR_X: /* A |= X */
|
||||
emit_alu_X(OR);
|
||||
break;
|
||||
case BPF_S_ALU_OR_K: /* A |= K */
|
||||
emit_alu_K(OR, K);
|
||||
break;
|
||||
case BPF_S_ALU_LSH_X: /* A <<= X */
|
||||
emit_alu_X(SLL);
|
||||
break;
|
||||
case BPF_S_ALU_LSH_K: /* A <<= K */
|
||||
emit_alu_K(SLL, K);
|
||||
break;
|
||||
case BPF_S_ALU_RSH_X: /* A >>= X */
|
||||
emit_alu_X(SRL);
|
||||
break;
|
||||
case BPF_S_ALU_RSH_K: /* A >>= K */
|
||||
emit_alu_K(SRL, K);
|
||||
break;
|
||||
case BPF_S_ALU_MUL_X: /* A *= X; */
|
||||
emit_alu_X(MUL);
|
||||
break;
|
||||
case BPF_S_ALU_MUL_K: /* A *= K */
|
||||
emit_alu_K(MUL, K);
|
||||
break;
|
||||
case BPF_S_ALU_DIV_K: /* A /= K */
|
||||
emit_alu_K(MUL, K);
|
||||
emit_read_y(r_A);
|
||||
break;
|
||||
case BPF_S_ALU_DIV_X: /* A /= X; */
|
||||
emit_cmpi(r_X, 0);
|
||||
if (pc_ret0 > 0) {
|
||||
t_offset = addrs[pc_ret0 - 1];
|
||||
#ifdef CONFIG_SPARC32
|
||||
emit_branch(BE, t_offset + 20);
|
||||
#else
|
||||
emit_branch(BE, t_offset + 8);
|
||||
#endif
|
||||
emit_nop(); /* delay slot */
|
||||
} else {
|
||||
emit_branch_off(BNE, 16);
|
||||
emit_nop();
|
||||
#ifdef CONFIG_SPARC32
|
||||
emit_jump(cleanup_addr + 20);
|
||||
#else
|
||||
emit_jump(cleanup_addr + 8);
|
||||
#endif
|
||||
emit_clear(r_A);
|
||||
}
|
||||
emit_write_y(G0);
|
||||
#ifdef CONFIG_SPARC32
|
||||
emit_nop();
|
||||
emit_nop();
|
||||
emit_nop();
|
||||
#endif
|
||||
emit_alu_X(DIV);
|
||||
break;
|
||||
case BPF_S_ALU_NEG:
|
||||
emit_neg();
|
||||
break;
|
||||
case BPF_S_RET_K:
|
||||
if (!K) {
|
||||
if (pc_ret0 == -1)
|
||||
pc_ret0 = i;
|
||||
emit_clear(r_A);
|
||||
} else {
|
||||
emit_loadimm(K, r_A);
|
||||
}
|
||||
/* Fallthrough */
|
||||
case BPF_S_RET_A:
|
||||
if (seen_or_pass0) {
|
||||
if (i != flen - 1) {
|
||||
emit_jump(cleanup_addr);
|
||||
emit_nop();
|
||||
break;
|
||||
}
|
||||
if (seen_or_pass0 & SEEN_MEM) {
|
||||
unsigned int sz = BASE_STACKFRAME;
|
||||
sz += BPF_MEMWORDS * sizeof(u32);
|
||||
emit_release_stack(sz);
|
||||
}
|
||||
}
|
||||
/* jmpl %r_saved_O7 + 8, %g0 */
|
||||
emit_jmpl(r_saved_O7, 8, G0);
|
||||
emit_reg_move(r_A, O0); /* delay slot */
|
||||
break;
|
||||
case BPF_S_MISC_TAX:
|
||||
seen |= SEEN_XREG;
|
||||
emit_reg_move(r_A, r_X);
|
||||
break;
|
||||
case BPF_S_MISC_TXA:
|
||||
seen |= SEEN_XREG;
|
||||
emit_reg_move(r_X, r_A);
|
||||
break;
|
||||
case BPF_S_ANC_CPU:
|
||||
emit_load_cpu(r_A);
|
||||
break;
|
||||
case BPF_S_ANC_PROTOCOL:
|
||||
emit_skb_load16(protocol, r_A);
|
||||
break;
|
||||
#if 0
|
||||
/* GCC won't let us take the address of
|
||||
* a bit field even though we very much
|
||||
* know what we are doing here.
|
||||
*/
|
||||
case BPF_S_ANC_PKTTYPE:
|
||||
__emit_skb_load8(pkt_type, r_A);
|
||||
emit_alu_K(SRL, 5);
|
||||
break;
|
||||
#endif
|
||||
case BPF_S_ANC_IFINDEX:
|
||||
emit_skb_loadptr(dev, r_A);
|
||||
emit_cmpi(r_A, 0);
|
||||
emit_branch(BNE_PTR, cleanup_addr + 4);
|
||||
emit_nop();
|
||||
emit_load32(r_A, struct net_device, ifindex, r_A);
|
||||
break;
|
||||
case BPF_S_ANC_MARK:
|
||||
emit_skb_load32(mark, r_A);
|
||||
break;
|
||||
case BPF_S_ANC_QUEUE:
|
||||
emit_skb_load16(queue_mapping, r_A);
|
||||
break;
|
||||
case BPF_S_ANC_HATYPE:
|
||||
emit_skb_loadptr(dev, r_A);
|
||||
emit_cmpi(r_A, 0);
|
||||
emit_branch(BNE_PTR, cleanup_addr + 4);
|
||||
emit_nop();
|
||||
emit_load16(r_A, struct net_device, type, r_A);
|
||||
break;
|
||||
case BPF_S_ANC_RXHASH:
|
||||
emit_skb_load32(rxhash, r_A);
|
||||
break;
|
||||
|
||||
case BPF_S_LD_IMM:
|
||||
emit_loadimm(K, r_A);
|
||||
break;
|
||||
case BPF_S_LDX_IMM:
|
||||
emit_loadimm(K, r_X);
|
||||
break;
|
||||
case BPF_S_LD_MEM:
|
||||
emit_ldmem(K * 4, r_A);
|
||||
break;
|
||||
case BPF_S_LDX_MEM:
|
||||
emit_ldmem(K * 4, r_X);
|
||||
break;
|
||||
case BPF_S_ST:
|
||||
emit_stmem(K * 4, r_A);
|
||||
break;
|
||||
case BPF_S_STX:
|
||||
emit_stmem(K * 4, r_X);
|
||||
break;
|
||||
|
||||
#define CHOOSE_LOAD_FUNC(K, func) \
|
||||
((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
|
||||
|
||||
case BPF_S_LD_W_ABS:
|
||||
func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_word);
|
||||
common_load: seen |= SEEN_DATAREF;
|
||||
emit_loadimm(K, r_OFF);
|
||||
emit_call(func);
|
||||
break;
|
||||
case BPF_S_LD_H_ABS:
|
||||
func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_half);
|
||||
goto common_load;
|
||||
case BPF_S_LD_B_ABS:
|
||||
func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte);
|
||||
goto common_load;
|
||||
case BPF_S_LDX_B_MSH:
|
||||
func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte_msh);
|
||||
goto common_load;
|
||||
case BPF_S_LD_W_IND:
|
||||
func = bpf_jit_load_word;
|
||||
common_load_ind: seen |= SEEN_DATAREF | SEEN_XREG;
|
||||
if (K) {
|
||||
if (is_simm13(K)) {
|
||||
emit_addi(r_X, K, r_OFF);
|
||||
} else {
|
||||
emit_loadimm(K, r_TMP);
|
||||
emit_add(r_X, r_TMP, r_OFF);
|
||||
}
|
||||
} else {
|
||||
emit_reg_move(r_X, r_OFF);
|
||||
}
|
||||
emit_call(func);
|
||||
break;
|
||||
case BPF_S_LD_H_IND:
|
||||
func = bpf_jit_load_half;
|
||||
goto common_load_ind;
|
||||
case BPF_S_LD_B_IND:
|
||||
func = bpf_jit_load_byte;
|
||||
goto common_load_ind;
|
||||
case BPF_S_JMP_JA:
|
||||
emit_jump(addrs[i + K]);
|
||||
emit_nop();
|
||||
break;
|
||||
|
||||
#define COND_SEL(CODE, TOP, FOP) \
|
||||
case CODE: \
|
||||
t_op = TOP; \
|
||||
f_op = FOP; \
|
||||
goto cond_branch
|
||||
|
||||
COND_SEL(BPF_S_JMP_JGT_K, BGU, BLEU);
|
||||
COND_SEL(BPF_S_JMP_JGE_K, BGEU, BLU);
|
||||
COND_SEL(BPF_S_JMP_JEQ_K, BE, BNE);
|
||||
COND_SEL(BPF_S_JMP_JSET_K, BNE, BE);
|
||||
COND_SEL(BPF_S_JMP_JGT_X, BGU, BLEU);
|
||||
COND_SEL(BPF_S_JMP_JGE_X, BGEU, BLU);
|
||||
COND_SEL(BPF_S_JMP_JEQ_X, BE, BNE);
|
||||
COND_SEL(BPF_S_JMP_JSET_X, BNE, BE);
|
||||
|
||||
cond_branch: f_offset = addrs[i + filter[i].jf];
|
||||
t_offset = addrs[i + filter[i].jt];
|
||||
|
||||
/* same targets, can avoid doing the test :) */
|
||||
if (filter[i].jt == filter[i].jf) {
|
||||
emit_jump(t_offset);
|
||||
emit_nop();
|
||||
break;
|
||||
}
|
||||
|
||||
switch (filter[i].code) {
|
||||
case BPF_S_JMP_JGT_X:
|
||||
case BPF_S_JMP_JGE_X:
|
||||
case BPF_S_JMP_JEQ_X:
|
||||
seen |= SEEN_XREG;
|
||||
emit_cmp(r_A, r_X);
|
||||
break;
|
||||
case BPF_S_JMP_JSET_X:
|
||||
seen |= SEEN_XREG;
|
||||
emit_btst(r_A, r_X);
|
||||
break;
|
||||
case BPF_S_JMP_JEQ_K:
|
||||
case BPF_S_JMP_JGT_K:
|
||||
case BPF_S_JMP_JGE_K:
|
||||
if (is_simm13(K)) {
|
||||
emit_cmpi(r_A, K);
|
||||
} else {
|
||||
emit_loadimm(K, r_TMP);
|
||||
emit_cmp(r_A, r_TMP);
|
||||
}
|
||||
break;
|
||||
case BPF_S_JMP_JSET_K:
|
||||
if (is_simm13(K)) {
|
||||
emit_btsti(r_A, K);
|
||||
} else {
|
||||
emit_loadimm(K, r_TMP);
|
||||
emit_btst(r_A, r_TMP);
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (filter[i].jt != 0) {
|
||||
if (filter[i].jf)
|
||||
t_offset += 8;
|
||||
emit_branch(t_op, t_offset);
|
||||
emit_nop(); /* delay slot */
|
||||
if (filter[i].jf) {
|
||||
emit_jump(f_offset);
|
||||
emit_nop();
|
||||
}
|
||||
break;
|
||||
}
|
||||
emit_branch(f_op, f_offset);
|
||||
emit_nop(); /* delay slot */
|
||||
break;
|
||||
|
||||
default:
|
||||
/* hmm, too complex filter, give up with jit compiler */
|
||||
goto out;
|
||||
}
|
||||
ilen = (void *) prog - (void *) temp;
|
||||
if (image) {
|
||||
if (unlikely(proglen + ilen > oldproglen)) {
|
||||
pr_err("bpb_jit_compile fatal error\n");
|
||||
kfree(addrs);
|
||||
module_free(NULL, image);
|
||||
return;
|
||||
}
|
||||
memcpy(image + proglen, temp, ilen);
|
||||
}
|
||||
proglen += ilen;
|
||||
addrs[i] = proglen;
|
||||
prog = temp;
|
||||
}
|
||||
/* last bpf instruction is always a RET :
|
||||
* use it to give the cleanup instruction(s) addr
|
||||
*/
|
||||
cleanup_addr = proglen - 8; /* jmpl; mov r_A,%o0; */
|
||||
if (seen_or_pass0 & SEEN_MEM)
|
||||
cleanup_addr -= 4; /* add %sp, X, %sp; */
|
||||
|
||||
if (image) {
|
||||
if (proglen != oldproglen)
|
||||
pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n",
|
||||
proglen, oldproglen);
|
||||
break;
|
||||
}
|
||||
if (proglen == oldproglen) {
|
||||
image = module_alloc(max_t(unsigned int,
|
||||
proglen,
|
||||
sizeof(struct work_struct)));
|
||||
if (!image)
|
||||
goto out;
|
||||
}
|
||||
oldproglen = proglen;
|
||||
}
|
||||
|
||||
if (bpf_jit_enable > 1)
|
||||
pr_err("flen=%d proglen=%u pass=%d image=%p\n",
|
||||
flen, proglen, pass, image);
|
||||
|
||||
if (image) {
|
||||
if (bpf_jit_enable > 1)
|
||||
print_hex_dump(KERN_ERR, "JIT code: ", DUMP_PREFIX_ADDRESS,
|
||||
16, 1, image, proglen, false);
|
||||
bpf_flush_icache(image, image + proglen);
|
||||
fp->bpf_func = (void *)image;
|
||||
}
|
||||
out:
|
||||
kfree(addrs);
|
||||
return;
|
||||
}
|
||||
|
||||
static void jit_free_defer(struct work_struct *arg)
|
||||
{
|
||||
module_free(NULL, arg);
|
||||
}
|
||||
|
||||
/* run from softirq, we must use a work_struct to call
|
||||
* module_free() from process context
|
||||
*/
|
||||
void bpf_jit_free(struct sk_filter *fp)
|
||||
{
|
||||
if (fp->bpf_func != sk_run_filter) {
|
||||
struct work_struct *work = (struct work_struct *)fp->bpf_func;
|
||||
|
||||
INIT_WORK(work, jit_free_defer);
|
||||
schedule_work(work);
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user