ARM: samsung: fix assembly syntax for new gas
Recent assembler versions complain about extraneous whitespace inside [] brackets. This fixes all of these instances for the samsung platforms. We should backport this to all kernels that might need to be built with new binutils. arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r2,[ r6,#(0x10)]' arch/arm/kernel/entry-armv.S:214: Error: ARM register expected -- `ldr r0,[ r6,#(0x14)]' arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r2,[ r6,#(0x10)]' arch/arm/kernel/entry-armv.S:430: Error: ARM register expected -- `ldr r0,[ r6,#(0x14)]' arch/arm/mach-s3c24xx/sleep-s3c2410.S: Assembler messages: arch/arm/mach-s3c24xx/sleep-s3c2410.S:48: Error: ARM register expected -- `ldr r7,[ r4 ]' arch/arm/mach-s3c24xx/sleep-s3c2410.S:49: Error: ARM register expected -- `ldr r8,[ r5 ]' arch/arm/mach-s3c24xx/sleep-s3c2410.S:50: Error: ARM register expected -- `ldr r9,[ r6 ]' arch/arm/mach-s3c24xx/sleep-s3c2410.S:64: Error: ARM register expected -- `streq r7,[ r4 ]' arch/arm/mach-s3c24xx/sleep-s3c2410.S:65: Error: ARM register expected -- `streq r8,[ r5 ]' arch/arm/mach-s3c24xx/sleep-s3c2410.S:66: Error: ARM register expected -- `streq r9,[ r6 ]' arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r2,#((0x0B0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-((0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))]' arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]' arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r2,#((0x0B0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-((0)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))]' arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]' arch/arm/mach-s3c24xx/pm-h1940.S: Assembler messages: arch/arm/mach-s3c24xx/pm-h1940.S:33: Error: ARM register expected -- `ldr pc,[ r0,#((0x0B8)+(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000))))-(((0x56000000)-(0x50000000))+(0xF6000000+(0x01000000)))]' arch/arm/mach-s3c24xx/sleep-s3c2412.S: Assembler messages: arch/arm/mach-s3c24xx/sleep-s3c2412.S:60: Error: ARM register expected -- `ldrne r9,[ r1 ]' arch/arm/mach-s3c24xx/sleep-s3c2412.S:61: Error: ARM register expected -- `strne r9,[ r1 ]' arch/arm/mach-s3c24xx/sleep-s3c2412.S:62: Error: ARM register expected -- `ldrne r9,[ r2 ]' arch/arm/mach-s3c24xx/sleep-s3c2412.S:63: Error: ARM register expected -- `strne r9,[ r2 ]' arch/arm/mach-s3c24xx/sleep-s3c2412.S:64: Error: ARM register expected -- `ldrne r9,[ r3 ]' arch/arm/mach-s3c24xx/sleep-s3c2412.S:65: Error: ARM register expected -- `strne r9,[ r3 ]' arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x08)]' arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]' arch/arm/kernel/debug.S:83: Error: ARM register expected -- `ldr r2,[ r3,#(0x10)]' arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x08)]' arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x18)]' arch/arm/kernel/debug.S:85: Error: ARM register expected -- `ldr r2,[ r3,#(0x10)]' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: stable@vger.kernel.org
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@ -40,17 +40,17 @@
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addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
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addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
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bic \rd, \rd, #0xff000
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ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
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ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
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and \rd, \rd, #0x00ff0000
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teq \rd, #0x00440000 @ is it 2440?
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1004:
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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moveq \rd, \rd, lsr #SHIFT_2440TXF
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tst \rd, #S3C2410_UFSTAT_TXFULL
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.endm
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.macro fifo_full_s3c2410 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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tst \rd, #S3C2410_UFSTAT_TXFULL
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.endm
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@ -68,18 +68,18 @@
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addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
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addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
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bic \rd, \rd, #0xff000
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ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
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ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
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and \rd, \rd, #0x00ff0000
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teq \rd, #0x00440000 @ is it 2440?
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10000:
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
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andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
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.endm
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.macro fifo_level_s3c2410 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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and \rd, \rd, #S3C2410_UFSTAT_TXMASK
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.endm
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@ -31,10 +31,10 @@
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@@ try the interrupt offset register, since it is there
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ldr \irqstat, [ \base, #INTPND ]
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ldr \irqstat, [\base, #INTPND ]
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teq \irqstat, #0
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beq 1002f
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ldr \irqnr, [ \base, #INTOFFSET ]
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ldr \irqnr, [\base, #INTOFFSET ]
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mov \tmp, #1
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tst \irqstat, \tmp, lsl \irqnr
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bne 1001f
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@ -30,4 +30,4 @@
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h1940_pm_return:
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mov r0, #S3C2410_PA_GPIO
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ldr pc, [ r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO ]
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ldr pc, [r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO]
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@ -45,9 +45,9 @@ ENTRY(s3c2410_cpu_suspend)
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ldr r4, =S3C2410_REFRESH
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ldr r5, =S3C24XX_MISCCR
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ldr r6, =S3C2410_CLKCON
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ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
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ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
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ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
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ldr r7, [r4] @ get REFRESH (and ensure in TLB)
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ldr r8, [r5] @ get MISCCR (and ensure in TLB)
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ldr r9, [r6] @ get CLKCON (and ensure in TLB)
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orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
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orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
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@ -61,8 +61,8 @@ ENTRY(s3c2410_cpu_suspend)
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@@ align next bit of code to cache line
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.align 5
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s3c2410_do_sleep:
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streq r7, [ r4 ] @ SDRAM sleep command
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streq r8, [ r5 ] @ SDRAM power-down config
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streq r9, [ r6 ] @ CPU sleep
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streq r7, [r4] @ SDRAM sleep command
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streq r8, [r5] @ SDRAM power-down config
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streq r9, [r6] @ CPU sleep
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1: beq 1b
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mov pc, r14
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@ -57,12 +57,12 @@ s3c2412_sleep_enter1:
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* retry, as simply returning causes the system to lock.
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*/
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ldrne r9, [ r1 ]
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strne r9, [ r1 ]
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ldrne r9, [ r2 ]
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strne r9, [ r2 ]
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ldrne r9, [ r3 ]
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strne r9, [ r3 ]
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ldrne r9, [r1]
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strne r9, [r1]
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ldrne r9, [r2]
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strne r9, [r2]
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ldrne r9, [r3]
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strne r9, [r3]
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bne s3c2412_sleep_enter1
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mov pc, r14
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@ -14,12 +14,12 @@
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/* The S5PV210/S5PC110 implementations are as belows. */
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.macro fifo_level_s5pv210 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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and \rd, \rd, #S5PV210_UFSTAT_TXMASK
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.endm
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.macro fifo_full_s5pv210 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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tst \rd, #S5PV210_UFSTAT_TXFULL
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.endm
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@ -27,7 +27,7 @@
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* most widely re-used */
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.macro fifo_level_s3c2440 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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and \rd, \rd, #S3C2440_UFSTAT_TXMASK
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.endm
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@ -36,7 +36,7 @@
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#endif
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.macro fifo_full_s3c2440 rd, rx
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ldr \rd, [ \rx, # S3C2410_UFSTAT ]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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tst \rd, #S3C2440_UFSTAT_TXFULL
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.endm
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@ -45,11 +45,11 @@
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#endif
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.macro senduart,rd,rx
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strb \rd, [\rx, # S3C2410_UTXH ]
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strb \rd, [\rx, # S3C2410_UTXH]
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.endm
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.macro busyuart, rd, rx
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ldr \rd, [ \rx, # S3C2410_UFCON ]
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ldr \rd, [\rx, # S3C2410_UFCON]
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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@ FIFO enabled...
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@ -60,7 +60,7 @@
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1001:
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@ busy waiting for non fifo
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ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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@ -68,7 +68,7 @@
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.endm
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.macro waituart,rd,rx
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ldr \rd, [ \rx, # S3C2410_UFCON ]
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ldr \rd, [\rx, # S3C2410_UFCON]
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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@ FIFO enabled...
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@ -79,7 +79,7 @@
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b 1002f
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1001:
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@ idle waiting for non fifo
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ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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