I2C for 6.11-rc1 second batch
The I2C core has two header documentation updates to be applied as the dependecies are in now. The I2C host drivers add some patches which nearly fell through the cracks, namely: Added descriptions in the DTS for the Qualcomm SM8650 and SM8550 Camera Control Interface (CCI). Added support for the "settle-time-us" property, which allows the gpio-mux device to switch from one bus to another with a configurable delay. The time can be set in the DTS. The latest change also includes file sorting. Fixed slot numbering in the SMBus framework to prevent failures when more than 8 slots are occupied. It now enforces a a maximum of 8 slots to be used. This ensures that the Intel PIIX4 device can register the SPDs correctly without failure, even if other slots are populated but not used. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmafkDoACgkQFA3kzBSg KbZxGA//UDwQSEmkzlkoUV2i3bAgVTVgoG6IPPNfbwnOo8aUS6uV85yPrbEejenU OPVMtieZzRyLAYQOSvzj/a4Cqrhsvryo82hLD1l4TtSoZgxPYRjM5j0TPk4mGHTx 8sfH5WmZ0yssvaK738/4Q7MfDjPTa/yBQ/cbiPHbGczBcqKidX9ExPQHGraZzbGb VQK7rSwy8qnDlz/9U/fmV1J4CPJufQrmD/tz/Ws2uyH49M9YSYpDkCwCEGE2OX9E v4nMQyFnL7c7SmF5NuLQecvJYnndy0vbnRr14kloFg2BdGE4rjSrgtUIWSZshgoQ kustbUdDD6W1QohpHUNc/sYIt1pwF4BkVyRzf99HaX3dsWmS5FgWoITyH+2OMcCz 1QVOtgAVw37Hg0oQMwDOuvBFyVa7aU3mvcB0/v+glaDnmVATgssXcZmhTPOv/Vg2 sgpirkVB3xrfG6qbi1g0nM9JuDuR/qYrgKa6aoXVO/xeKwv9+sH7GqK4iTc+t60G hciJ11iPnnING9O5zCrpKpZxXkGFlncGaay9eEEJ1qtdDQk9ZBEh1+hYaGwDvvWL eehkZBjWQG83rhaeSbnilrbsrRcQRBhp6SrXojL3oqOgxzNkEnuX8HdKEfhFTHkR g2sIwfRO+wXggn7RiGqbOMeMwfM2heHB9qKaqxRPKvuzNgDgIxg= =WgDo -----END PGP SIGNATURE----- Merge tag 'i2c-for-6.11-rc1-second-batch' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull more i2c updates from Wolfram Sang: "The I2C core has two header documentation updates as the dependecies are in now. The I2C host drivers add some patches which nearly fell through the cracks: - Added descriptions in the DTS for the Qualcomm SM8650 and SM8550 Camera Control Interface (CCI). - Added support for the "settle-time-us" property, which allows the gpio-mux device to switch from one bus to another with a configurable delay. The time can be set in the DTS. The latest change also includes file sorting. - Fixed slot numbering in the SMBus framework to prevent failures when more than 8 slots are occupied. It now enforces a a maximum of 8 slots to be used. This ensures that the Intel PIIX4 device can register the SPDs correctly without failure, even if other slots are populated but not used" * tag 'i2c-for-6.11-rc1-second-batch' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: header: improve kdoc for i2c_algorithm i2c: header: remove unneeded stuff regarding i2c_algorithm i2c: piix4: Register SPDs i2c: smbus: remove i801 assumptions from SPD probing i2c: mux: gpio: Add support for the 'settle-time-us' property i2c: mux: gpio: Re-order #include to match alphabetic order dt-bindings: i2c: mux-gpio: Add 'settle-time-us' property dt-bindings: i2c: qcom-cci: Document sm8650 compatible dt-bindings: i2c: qcom-cci: Document sm8550 compatible
This commit is contained in:
commit
28bbe4ea68
@ -57,6 +57,9 @@ properties:
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last value used.
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last value used.
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$ref: /schemas/types.yaml#/definitions/uint32
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$ref: /schemas/types.yaml#/definitions/uint32
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settle-time-us:
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description: Delay to wait before doing any transfer when a new bus gets selected.
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allOf:
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allOf:
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- $ref: i2c-mux.yaml
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- $ref: i2c-mux.yaml
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@ -31,6 +31,8 @@ properties:
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- qcom,sm6350-cci
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- qcom,sm6350-cci
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- qcom,sm8250-cci
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- qcom,sm8250-cci
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- qcom,sm8450-cci
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- qcom,sm8450-cci
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- qcom,sm8550-cci
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- qcom,sm8650-cci
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- const: qcom,msm8996-cci # CCI v2
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- const: qcom,msm8996-cci # CCI v2
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"#address-cells":
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"#address-cells":
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@ -195,6 +197,24 @@ allOf:
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- const: cpas_ahb
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- const: cpas_ahb
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- const: cci
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- const: cci
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8550-cci
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- qcom,sm8650-cci
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then:
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: camnoc_axi
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- const: cpas_ahb
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- const: cci
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additionalProperties: false
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additionalProperties: false
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examples:
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examples:
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@ -196,6 +196,7 @@ config I2C_ISMT
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config I2C_PIIX4
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config I2C_PIIX4
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tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
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tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
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depends on PCI && HAS_IOPORT
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depends on PCI && HAS_IOPORT
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select I2C_SMBUS
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help
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help
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If you say yes to this option, support will be included for the Intel
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If you say yes to this option, support will be included for the Intel
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PIIX4 family of mainboard I2C interfaces. Specifically, the following
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PIIX4 family of mainboard I2C interfaces. Specifically, the following
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@ -29,6 +29,7 @@
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#include <linux/stddef.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include <linux/i2c.h>
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#include <linux/i2c-smbus.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/dmi.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <linux/acpi.h>
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@ -982,6 +983,14 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
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return retval;
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return retval;
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}
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}
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/*
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* The AUX bus can not be probed as on some platforms it reports all
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* devices present and all reads return "0".
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* This would allow the ee1004 to be probed incorrectly.
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*/
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if (port == 0)
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i2c_register_spd(adap);
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*padap = adap;
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*padap = adap;
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return 0;
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return 0;
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}
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}
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@ -352,18 +352,11 @@ void i2c_register_spd(struct i2c_adapter *adap)
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return;
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return;
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/*
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/*
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* If we're a child adapter on a muxed segment, then limit slots to 8,
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* The max number of SPD EEPROMs that can be addressed per bus is 8.
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* as this is the max number of SPD EEPROMs that can be addressed per bus.
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* If more slots are present either muxed or multiple busses are
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* necessary or the additional slots are ignored.
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*/
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*/
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if (i2c_parent_is_i2c_adapter(adap)) {
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slot_count = min(slot_count, 8);
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slot_count = 8;
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} else {
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if (slot_count > 8) {
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dev_warn(&adap->dev,
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"More than 8 memory slots on a single bus, contact i801 maintainer to add missing mux config\n");
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return;
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}
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}
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/*
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/*
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* Memory types could be found at section 7.18.2 (Memory Device — Type), table 78
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* Memory types could be found at section 7.18.2 (Memory Device — Type), table 78
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@ -5,16 +5,17 @@
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* Peter Korsgaard <peter.korsgaard@barco.com>
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* Peter Korsgaard <peter.korsgaard@barco.com>
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*/
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*/
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#include <linux/bits.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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#include <linux/i2c.h>
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#include <linux/i2c.h>
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#include <linux/i2c-mux.h>
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#include <linux/i2c-mux.h>
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#include <linux/module.h>
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#include <linux/overflow.h>
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#include <linux/overflow.h>
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#include <linux/platform_data/i2c-mux-gpio.h>
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#include <linux/platform_data/i2c-mux-gpio.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/bits.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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struct gpiomux {
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struct gpiomux {
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struct i2c_mux_gpio_platform_data data;
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struct i2c_mux_gpio_platform_data data;
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@ -37,6 +38,9 @@ static int i2c_mux_gpio_select(struct i2c_mux_core *muxc, u32 chan)
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i2c_mux_gpio_set(mux, chan);
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i2c_mux_gpio_set(mux, chan);
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if (mux->data.settle_time)
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fsleep(mux->data.settle_time);
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return 0;
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return 0;
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}
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}
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@ -116,6 +120,8 @@ static int i2c_mux_gpio_probe_fw(struct gpiomux *mux,
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if (device_property_read_u32(dev, "idle-state", &mux->data.idle))
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if (device_property_read_u32(dev, "idle-state", &mux->data.idle))
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mux->data.idle = I2C_MUX_GPIO_NO_IDLE;
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mux->data.idle = I2C_MUX_GPIO_NO_IDLE;
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device_property_read_u32(dev, "settle-time-us", &mux->data.settle_time);
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return 0;
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return 0;
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}
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}
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@ -30,7 +30,6 @@ extern const struct device_type i2c_client_type;
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/* --- General options ------------------------------------------------ */
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/* --- General options ------------------------------------------------ */
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struct i2c_msg;
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struct i2c_msg;
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struct i2c_algorithm;
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struct i2c_adapter;
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struct i2c_adapter;
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struct i2c_client;
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struct i2c_client;
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struct i2c_driver;
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struct i2c_driver;
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#endif /* I2C_BOARDINFO */
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#endif /* I2C_BOARDINFO */
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/**
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/**
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* struct i2c_algorithm - represent I2C transfer method
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* struct i2c_algorithm - represent I2C transfer methods
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* @xfer: Issue a set of i2c transactions to the given I2C adapter
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* @xfer: Transfer a given number of messages defined by the msgs array via
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* defined by the msgs array, with num messages available to transfer via
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* the specified adapter.
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* the adapter specified by adap.
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* @xfer_atomic: Same as @xfer. Yet, only using atomic context so e.g. PMICs
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* @xfer_atomic: same as @xfer. Yet, only using atomic context
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* can be accessed very late before shutdown. Optional.
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* so e.g. PMICs can be accessed very late before shutdown. Optional.
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* @smbus_xfer: Issue SMBus transactions to the given I2C adapter. If this
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* @smbus_xfer: Issue smbus transactions to the given I2C adapter. If this
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* is not present, then the bus layer will try and convert the SMBus calls
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* is not present, then the bus layer will try and convert the SMBus calls
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* into I2C transfers instead.
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* into I2C transfers instead.
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* @smbus_xfer_atomic: same as @smbus_xfer. Yet, only using atomic context
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* @smbus_xfer_atomic: Same as @smbus_xfer. Yet, only using atomic context
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* so e.g. PMICs can be accessed very late before shutdown. Optional.
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* so e.g. PMICs can be accessed very late before shutdown. Optional.
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* @functionality: Return the flags that this algorithm/adapter pair supports
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* @functionality: Return the flags that this algorithm/adapter pair supports
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* from the ``I2C_FUNC_*`` flags.
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* from the ``I2C_FUNC_*`` flags.
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@ -533,8 +531,6 @@ i2c_register_board_info(int busnum, struct i2c_board_info const *info,
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* @reg_slave: deprecated, use @reg_target
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* @reg_slave: deprecated, use @reg_target
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* @unreg_slave: deprecated, use @unreg_target
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* @unreg_slave: deprecated, use @unreg_target
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*
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*
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*
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* The following structs are for those who like to implement new bus drivers:
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* i2c_algorithm is the interface to a class of hardware solutions which can
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* i2c_algorithm is the interface to a class of hardware solutions which can
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* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
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* be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584
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* to name two of the most common.
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* to name two of the most common.
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@ -550,9 +546,6 @@ struct i2c_algorithm {
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* to NULL. If an adapter algorithm can do SMBus access, set
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* to NULL. If an adapter algorithm can do SMBus access, set
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* smbus_xfer. If set to NULL, the SMBus protocol is simulated
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* smbus_xfer. If set to NULL, the SMBus protocol is simulated
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* using common I2C messages.
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* using common I2C messages.
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*
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* xfer should return the number of messages successfully
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* processed, or a negative value on error
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*/
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*/
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union {
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union {
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int (*xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
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int (*xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs,
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@ -19,6 +19,7 @@
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* position
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* position
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* @n_values: Number of multiplexer positions (busses to instantiate)
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* @n_values: Number of multiplexer positions (busses to instantiate)
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* @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used
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* @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used
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* @settle_time: Delay to wait when a new bus is selected
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*/
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*/
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struct i2c_mux_gpio_platform_data {
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struct i2c_mux_gpio_platform_data {
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int parent;
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int parent;
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@ -26,6 +27,7 @@ struct i2c_mux_gpio_platform_data {
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const unsigned *values;
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const unsigned *values;
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int n_values;
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int n_values;
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unsigned idle;
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unsigned idle;
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u32 settle_time;
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};
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};
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#endif /* _LINUX_I2C_MUX_GPIO_H */
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#endif /* _LINUX_I2C_MUX_GPIO_H */
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Block a user