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ARM: dts: qcom: Add SoC-specific string for sdhci-msm-v4 nodes

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As per upstream discussion [1], we should have an SoC-specific
compatible string for Qualcomm's SDHCI nodes.  Let's add it.

[1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Douglas Anderson 2018-11-05 13:09:20 -08:00 committed by Andy Gross
parent 0567022c01
commit 28d13d317b
2 changed files with 5 additions and 5 deletions
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4
arch/arm/boot/dts/qcom-apq8084.dtsi
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@ -412,7 +412,7 @@
};
sdhci@f9824900 {
compatible = "qcom,sdhci-msm-v4";
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <0 123 0>, <0 138 0>;
@ -425,7 +425,7 @@
};
sdhci@f98a4900 {
compatible = "qcom,sdhci-msm-v4";
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <0 125 0>, <0 221 0>;

6
arch/arm/boot/dts/qcom-msm8974.dtsi
View File

@ -604,7 +604,7 @@
};
sdhci@f9824900 {
compatible = "qcom,sdhci-msm-v4";
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
@ -618,7 +618,7 @@
};
sdhci@f9864900 {
compatible = "qcom,sdhci-msm-v4";
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
@ -632,7 +632,7 @@
};
sdhci@f98a4900 {
compatible = "qcom,sdhci-msm-v4";
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,