i2c: tegra: Always terminate DMA transfer
It is possible that I2C could error out in the middle of DMA transfer and in this case DMA channel needs to be reset, otherwise a follow up transfer will fail because DMA channel stays blocked. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -1220,11 +1220,12 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
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time_left = tegra_i2c_wait_completion_timeout(
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i2c_dev, &i2c_dev->dma_complete, xfer_time);
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dmaengine_terminate_sync(i2c_dev->msg_read ?
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i2c_dev->rx_dma_chan :
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i2c_dev->tx_dma_chan);
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if (time_left == 0) {
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dev_err(i2c_dev->dev, "DMA transfer timeout\n");
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dmaengine_terminate_sync(i2c_dev->msg_read ?
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i2c_dev->rx_dma_chan :
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i2c_dev->tx_dma_chan);
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tegra_i2c_init(i2c_dev, true);
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return -ETIMEDOUT;
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}
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@ -1237,11 +1238,6 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
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memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf,
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msg->len);
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}
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if (i2c_dev->msg_err != I2C_ERR_NONE)
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dmaengine_synchronize(i2c_dev->msg_read ?
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i2c_dev->rx_dma_chan :
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i2c_dev->tx_dma_chan);
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}
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time_left = tegra_i2c_wait_completion_timeout(
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