drm/amd/smu: Increace dpm level count only for smu v13.0.2
Only V13.0.2 on SMU v13 will get 0 based max level from fw and increment by one, other ASIC will not need for this. V2: replace the asic_type check with ip versioning check. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1750,8 +1750,8 @@ int smu_v13_0_get_dpm_level_count(struct smu_context *smu,
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int ret;
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ret = smu_v13_0_get_dpm_freq_by_index(smu, clk_type, 0xff, value);
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/* FW returns 0 based max level, increment by one */
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if (!ret && value)
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/* SMU v13.0.2 FW returns 0 based max level, increment by one for it */
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if((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) && (!ret && value))
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++(*value);
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return ret;
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