ASoC: codecs: da*: rename to snd_soc_component_read()
We need to use snd_soc_component_read() instead of snd_soc_component_read32() This patch renames _read32() to _read() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Link: https://lore.kernel.org/r/87bllj4mc8.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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467a2553dd
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2925b58209
@ -330,7 +330,7 @@ static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
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if (ucontrol->value.integer.value[0]) {
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/* Check if noise suppression is enabled */
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if (snd_soc_component_read32(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
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if (snd_soc_component_read(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
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dev_dbg(component->dev,
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"Disable noise suppression to enable ALC\n");
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return -EINVAL;
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@ -354,27 +354,27 @@ static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,
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if (ucontrol->value.integer.value[0]) {
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/* Check if ALC is enabled */
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if (snd_soc_component_read32(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
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if (snd_soc_component_read(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
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goto err;
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/* Check ZC for HP and AUX1 PGA */
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if ((snd_soc_component_read32(component, DA7210_ZERO_CROSS) &
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if ((snd_soc_component_read(component, DA7210_ZERO_CROSS) &
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(DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC |
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DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC |
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DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC))
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goto err;
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/* Check INPGA_L_VOL and INPGA_R_VOL */
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val = snd_soc_component_read32(component, DA7210_IN_GAIN);
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val = snd_soc_component_read(component, DA7210_IN_GAIN);
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if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) ||
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(((val & DA7210_INPGA_R_VOL) >> 4) <
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DA7210_INPGA_MIN_VOL_NS))
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goto err;
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/* Check AUX1_L_VOL and AUX1_R_VOL */
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if (((snd_soc_component_read32(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
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if (((snd_soc_component_read(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
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DA7210_AUX1_MIN_VOL_NS) ||
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((snd_soc_component_read32(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
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((snd_soc_component_read(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
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DA7210_AUX1_MIN_VOL_NS))
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goto err;
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}
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@ -767,7 +767,7 @@ static int da7210_hw_params(struct snd_pcm_substream *substream,
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/* Enable DAI */
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snd_soc_component_write(component, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);
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dai_cfg1 = 0xFC & snd_soc_component_read32(component, DA7210_DAI_CFG1);
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dai_cfg1 = 0xFC & snd_soc_component_read(component, DA7210_DAI_CFG1);
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switch (params_width(params)) {
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case 16:
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@ -874,11 +874,11 @@ static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
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u32 dai_cfg1;
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u32 dai_cfg3;
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dai_cfg1 = 0x7f & snd_soc_component_read32(component, DA7210_DAI_CFG1);
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dai_cfg3 = 0xfc & snd_soc_component_read32(component, DA7210_DAI_CFG3);
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dai_cfg1 = 0x7f & snd_soc_component_read(component, DA7210_DAI_CFG1);
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dai_cfg3 = 0xfc & snd_soc_component_read(component, DA7210_DAI_CFG3);
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if ((snd_soc_component_read32(component, DA7210_PLL) & DA7210_PLL_EN) &&
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(!(snd_soc_component_read32(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
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if ((snd_soc_component_read(component, DA7210_PLL) & DA7210_PLL_EN) &&
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(!(snd_soc_component_read(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
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return -EINVAL;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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@ -927,7 +927,7 @@ static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
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static int da7210_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_component *component = dai->component;
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u8 mute_reg = snd_soc_component_read32(component, DA7210_DAC_HPF) & 0xFB;
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u8 mute_reg = snd_soc_component_read(component, DA7210_DAC_HPF) & 0xFB;
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if (mute)
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snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg | 0x4);
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@ -205,12 +205,12 @@ static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val)
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/* Select middle 8 bits for read back from data register */
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snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
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reg_val | DA7213_ALC_DATA_MIDDLE);
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mid_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA);
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mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
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/* Select top 8 bits for read back from data register */
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snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
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reg_val | DA7213_ALC_DATA_TOP);
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top_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA);
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top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
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sum += ((mid_data << 8) | (top_data << 16));
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}
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@ -259,7 +259,7 @@ static void da7213_alc_calib_auto(struct snd_soc_component *component)
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snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
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DA7213_ALC_AUTO_CALIB_EN);
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do {
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alc_ctrl1 = snd_soc_component_read32(component, DA7213_ALC_CTRL1);
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alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1);
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} while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
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/* If auto calibration fails, fall back to digital gain only mode */
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@ -286,16 +286,16 @@ static void da7213_alc_calib(struct snd_soc_component *component)
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u8 mic_1_ctrl, mic_2_ctrl;
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/* Save current values from ADC control registers */
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adc_l_ctrl = snd_soc_component_read32(component, DA7213_ADC_L_CTRL);
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adc_r_ctrl = snd_soc_component_read32(component, DA7213_ADC_R_CTRL);
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adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL);
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adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL);
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/* Save current values from MIXIN_L/R_SELECT registers */
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mixin_l_sel = snd_soc_component_read32(component, DA7213_MIXIN_L_SELECT);
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mixin_r_sel = snd_soc_component_read32(component, DA7213_MIXIN_R_SELECT);
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mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT);
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mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT);
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/* Save current values from MIC control registers */
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mic_1_ctrl = snd_soc_component_read32(component, DA7213_MIC_1_CTRL);
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mic_2_ctrl = snd_soc_component_read32(component, DA7213_MIC_2_CTRL);
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mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL);
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mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL);
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/* Enable ADC Left and Right */
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snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
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@ -751,7 +751,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
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DA7213_PC_FREERUN_MASK, 0);
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/* If SRM not enabled then nothing more to do */
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pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL);
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pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
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if (!(pll_ctrl & DA7213_PLL_SRM_EN))
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return 0;
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@ -764,7 +764,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
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/* Check SRM has locked */
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do {
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pll_status = snd_soc_component_read32(component, DA7213_PLL_STATUS);
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pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS);
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if (pll_status & DA7219_PLL_SRM_LOCK) {
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srm_lock = true;
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} else {
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@ -779,7 +779,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
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return 0;
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case SND_SOC_DAPM_POST_PMD:
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/* Revert 32KHz PLL lock udpates if applied previously */
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pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL);
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pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
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if (pll_ctrl & DA7213_PLL_32K_MODE) {
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snd_soc_component_write(component, 0xF0, 0x8B);
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snd_soc_component_write(component, 0xF2, 0x01);
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@ -298,22 +298,22 @@ static void da7218_alc_calib(struct snd_soc_component *component)
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bool calibrated = false;
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/* Save current state of MIC control registers */
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mic_1_ctrl = snd_soc_component_read32(component, DA7218_MIC_1_CTRL);
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mic_2_ctrl = snd_soc_component_read32(component, DA7218_MIC_2_CTRL);
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mic_1_ctrl = snd_soc_component_read(component, DA7218_MIC_1_CTRL);
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mic_2_ctrl = snd_soc_component_read(component, DA7218_MIC_2_CTRL);
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/* Save current state of input mixer control registers */
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mixin_1_ctrl = snd_soc_component_read32(component, DA7218_MIXIN_1_CTRL);
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mixin_2_ctrl = snd_soc_component_read32(component, DA7218_MIXIN_2_CTRL);
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mixin_1_ctrl = snd_soc_component_read(component, DA7218_MIXIN_1_CTRL);
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mixin_2_ctrl = snd_soc_component_read(component, DA7218_MIXIN_2_CTRL);
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/* Save current state of input filter control registers */
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in_1l_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_1L_FILTER_CTRL);
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in_1r_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_1R_FILTER_CTRL);
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in_2l_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_2L_FILTER_CTRL);
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in_2r_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_2R_FILTER_CTRL);
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in_1l_filt_ctrl = snd_soc_component_read(component, DA7218_IN_1L_FILTER_CTRL);
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in_1r_filt_ctrl = snd_soc_component_read(component, DA7218_IN_1R_FILTER_CTRL);
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in_2l_filt_ctrl = snd_soc_component_read(component, DA7218_IN_2L_FILTER_CTRL);
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in_2r_filt_ctrl = snd_soc_component_read(component, DA7218_IN_2R_FILTER_CTRL);
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/* Save current state of input HPF control registers */
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in_1_hpf_ctrl = snd_soc_component_read32(component, DA7218_IN_1_HPF_FILTER_CTRL);
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in_2_hpf_ctrl = snd_soc_component_read32(component, DA7218_IN_2_HPF_FILTER_CTRL);
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in_1_hpf_ctrl = snd_soc_component_read(component, DA7218_IN_1_HPF_FILTER_CTRL);
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in_2_hpf_ctrl = snd_soc_component_read(component, DA7218_IN_2_HPF_FILTER_CTRL);
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/* Enable then Mute MIC PGAs */
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snd_soc_component_update_bits(component, DA7218_MIC_1_CTRL, DA7218_MIC_1_AMP_EN_MASK,
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@ -369,7 +369,7 @@ static void da7218_alc_calib(struct snd_soc_component *component)
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snd_soc_component_update_bits(component, DA7218_CALIB_CTRL, DA7218_CALIB_AUTO_EN_MASK,
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DA7218_CALIB_AUTO_EN_MASK);
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do {
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calib_ctrl = snd_soc_component_read32(component, DA7218_CALIB_CTRL);
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calib_ctrl = snd_soc_component_read(component, DA7218_CALIB_CTRL);
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if (calib_ctrl & DA7218_CALIB_AUTO_EN_MASK) {
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++i;
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usleep_range(DA7218_ALC_CALIB_DELAY_MIN,
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@ -613,7 +613,7 @@ static int da7218_biquad_coeff_put(struct snd_kcontrol *kcontrol,
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}
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/* Make sure at least out filter1 enabled to allow programming */
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out_filt1l = snd_soc_component_read32(component, DA7218_OUT_1L_FILTER_CTRL);
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out_filt1l = snd_soc_component_read(component, DA7218_OUT_1L_FILTER_CTRL);
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snd_soc_component_write(component, DA7218_OUT_1L_FILTER_CTRL,
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out_filt1l | DA7218_OUT_1L_FILTER_EN_MASK);
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@ -1419,7 +1419,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
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i = 0;
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success = false;
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do {
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refosc_cal = snd_soc_component_read32(component, DA7218_PLL_REFOSC_CAL);
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refosc_cal = snd_soc_component_read(component, DA7218_PLL_REFOSC_CAL);
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if (!(refosc_cal & DA7218_PLL_REFOSC_CAL_START_MASK)) {
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success = true;
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} else {
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@ -1438,7 +1438,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
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DA7218_PC_RESYNC_AUTO_MASK);
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/* If SRM not enabled, we don't need to check status */
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pll_ctrl = snd_soc_component_read32(component, DA7218_PLL_CTRL);
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pll_ctrl = snd_soc_component_read(component, DA7218_PLL_CTRL);
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if ((pll_ctrl & DA7218_PLL_MODE_MASK) != DA7218_PLL_MODE_SRM)
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return 0;
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@ -1446,7 +1446,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
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i = 0;
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success = false;
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do {
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pll_status = snd_soc_component_read32(component, DA7218_PLL_STATUS);
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pll_status = snd_soc_component_read(component, DA7218_PLL_STATUS);
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if (pll_status & DA7218_PLL_SRM_STATUS_SRM_LOCK) {
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success = true;
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} else {
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@ -2236,7 +2236,7 @@ static void da7218_hpldet_irq(struct snd_soc_component *component)
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u8 jack_status;
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int report;
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jack_status = snd_soc_component_read32(component, DA7218_EVENT_STATUS);
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jack_status = snd_soc_component_read(component, DA7218_EVENT_STATUS);
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if (jack_status & DA7218_HPLDET_JACK_STS_MASK)
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report = SND_JACK_HEADPHONE;
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@ -2256,7 +2256,7 @@ static irqreturn_t da7218_irq_thread(int irq, void *data)
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u8 status;
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/* Read IRQ status reg */
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status = snd_soc_component_read32(component, DA7218_EVENT);
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status = snd_soc_component_read(component, DA7218_EVENT);
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if (!status)
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return IRQ_NONE;
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@ -73,7 +73,7 @@ static void da7219_aad_btn_det_work(struct work_struct *work)
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snd_soc_dapm_sync(dapm);
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do {
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statusa = snd_soc_component_read32(component, DA7219_ACCDET_STATUS_A);
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statusa = snd_soc_component_read(component, DA7219_ACCDET_STATUS_A);
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if (statusa & DA7219_MICBIAS_UP_STS_MASK)
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micbias_up = true;
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else if (retries++ < DA7219_AAD_MICBIAS_CHK_RETRIES)
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@ -91,7 +91,7 @@ static void da7219_aad_btn_det_work(struct work_struct *work)
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*/
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if (da7219_aad->micbias_pulse_lvl && da7219_aad->micbias_pulse_time) {
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/* Pulse higher level voltage */
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micbias_ctrl = snd_soc_component_read32(component, DA7219_MICBIAS_CTRL);
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micbias_ctrl = snd_soc_component_read(component, DA7219_MICBIAS_CTRL);
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snd_soc_component_update_bits(component, DA7219_MICBIAS_CTRL,
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DA7219_MICBIAS1_LEVEL_MASK,
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da7219_aad->micbias_pulse_lvl);
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@ -141,11 +141,11 @@ static void da7219_aad_hptest_work(struct work_struct *work)
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* If MCLK is present, but PLL is not enabled then we enable it here to
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* ensure a consistent detection procedure.
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*/
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pll_srm_sts = snd_soc_component_read32(component, DA7219_PLL_SRM_STS);
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pll_srm_sts = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
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if (pll_srm_sts & DA7219_PLL_SRM_STS_MCLK) {
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tonegen_freq_hptest = cpu_to_le16(DA7219_AAD_HPTEST_RAMP_FREQ);
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pll_ctrl = snd_soc_component_read32(component, DA7219_PLL_CTRL);
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pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
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if ((pll_ctrl & DA7219_PLL_MODE_MASK) == DA7219_PLL_MODE_BYPASS)
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da7219_set_pll(component, DA7219_SYSCLK_PLL,
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DA7219_PLL_FREQ_OUT_98304);
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@ -154,7 +154,7 @@ static void da7219_aad_hptest_work(struct work_struct *work)
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}
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/* Ensure gain ramping at fastest rate */
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gain_ramp_ctrl = snd_soc_component_read32(component, DA7219_GAIN_RAMP_CTRL);
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gain_ramp_ctrl = snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
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snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_X8);
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/* Bypass cache so it saves current settings */
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@ -248,7 +248,7 @@ static void da7219_aad_hptest_work(struct work_struct *work)
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msleep(DA7219_AAD_HPTEST_PERIOD);
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/* Grab comparator reading */
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accdet_cfg8 = snd_soc_component_read32(component, DA7219_ACCDET_CONFIG_8);
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accdet_cfg8 = snd_soc_component_read(component, DA7219_ACCDET_CONFIG_8);
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if (accdet_cfg8 & DA7219_HPTEST_COMP_MASK)
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report |= SND_JACK_HEADPHONE;
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else
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@ -357,7 +357,7 @@ static irqreturn_t da7219_aad_irq_thread(int irq, void *data)
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return IRQ_NONE;
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/* Read status register for jack insertion & type status */
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statusa = snd_soc_component_read32(component, DA7219_ACCDET_STATUS_A);
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statusa = snd_soc_component_read(component, DA7219_ACCDET_STATUS_A);
|
||||
|
||||
/* Clear events */
|
||||
regmap_bulk_write(da7219->regmap, DA7219_ACCDET_IRQ_EVENT_A,
|
||||
@ -847,7 +847,7 @@ void da7219_aad_suspend(struct snd_soc_component *component)
|
||||
* suspend then this will be dealt with through the IRQ handler.
|
||||
*/
|
||||
if (da7219_aad->jack_inserted) {
|
||||
micbias_ctrl = snd_soc_component_read32(component, DA7219_MICBIAS_CTRL);
|
||||
micbias_ctrl = snd_soc_component_read(component, DA7219_MICBIAS_CTRL);
|
||||
if (micbias_ctrl & DA7219_MICBIAS1_EN_MASK) {
|
||||
snd_soc_dapm_disable_pin(dapm, "Mic Bias");
|
||||
snd_soc_dapm_sync(dapm);
|
||||
|
@ -313,13 +313,13 @@ static void da7219_alc_calib(struct snd_soc_component *component)
|
||||
u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl;
|
||||
|
||||
/* Save current state of mic control register */
|
||||
mic_ctrl = snd_soc_component_read32(component, DA7219_MIC_1_CTRL);
|
||||
mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL);
|
||||
|
||||
/* Save current state of input mixer control register */
|
||||
mixin_ctrl = snd_soc_component_read32(component, DA7219_MIXIN_L_CTRL);
|
||||
mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL);
|
||||
|
||||
/* Save current state of input ADC control register */
|
||||
adc_ctrl = snd_soc_component_read32(component, DA7219_ADC_L_CTRL);
|
||||
adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL);
|
||||
|
||||
/* Enable then Mute MIC PGAs */
|
||||
snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK,
|
||||
@ -344,7 +344,7 @@ static void da7219_alc_calib(struct snd_soc_component *component)
|
||||
DA7219_ALC_AUTO_CALIB_EN_MASK,
|
||||
DA7219_ALC_AUTO_CALIB_EN_MASK);
|
||||
do {
|
||||
calib_ctrl = snd_soc_component_read32(component, DA7219_ALC_CTRL1);
|
||||
calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1);
|
||||
} while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK);
|
||||
|
||||
/* If auto calibration fails, disable DC offset, hybrid ALC */
|
||||
@ -822,13 +822,13 @@ static int da7219_dai_event(struct snd_soc_dapm_widget *w,
|
||||
DA7219_PC_FREERUN_MASK, 0);
|
||||
|
||||
/* Slave mode, if SRM not enabled no need for status checks */
|
||||
pll_ctrl = snd_soc_component_read32(component, DA7219_PLL_CTRL);
|
||||
pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
|
||||
if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM)
|
||||
return 0;
|
||||
|
||||
/* Check SRM has locked */
|
||||
do {
|
||||
pll_status = snd_soc_component_read32(component, DA7219_PLL_SRM_STS);
|
||||
pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
|
||||
if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) {
|
||||
srm_lock = true;
|
||||
} else {
|
||||
@ -928,7 +928,7 @@ static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w,
|
||||
case SND_SOC_DAPM_PRE_PMD:
|
||||
/* Ensure nominal gain ramping for DAPM sequence */
|
||||
da7219->gain_ramp_ctrl =
|
||||
snd_soc_component_read32(component, DA7219_GAIN_RAMP_CTRL);
|
||||
snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
|
||||
snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
|
||||
DA7219_GAIN_RAMP_RATE_NOMINAL);
|
||||
break;
|
||||
@ -1930,7 +1930,7 @@ static int da7219_wclk_is_prepared(struct clk_hw *hw)
|
||||
if (!da7219->master)
|
||||
return -EINVAL;
|
||||
|
||||
clk_reg = snd_soc_component_read32(component, DA7219_DAI_CLK_MODE);
|
||||
clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE);
|
||||
|
||||
return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);
|
||||
}
|
||||
@ -1942,7 +1942,7 @@ static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw,
|
||||
container_of(hw, struct da7219_priv,
|
||||
dai_clks_hw[DA7219_DAI_WCLK_IDX]);
|
||||
struct snd_soc_component *component = da7219->component;
|
||||
u8 fs = snd_soc_component_read32(component, DA7219_SR);
|
||||
u8 fs = snd_soc_component_read(component, DA7219_SR);
|
||||
|
||||
switch (fs & DA7219_SR_MASK) {
|
||||
case DA7219_SR_8000:
|
||||
@ -2027,7 +2027,7 @@ static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw,
|
||||
container_of(hw, struct da7219_priv,
|
||||
dai_clks_hw[DA7219_DAI_BCLK_IDX]);
|
||||
struct snd_soc_component *component = da7219->component;
|
||||
u8 bclks_per_wclk = snd_soc_component_read32(component,
|
||||
u8 bclks_per_wclk = snd_soc_component_read(component,
|
||||
DA7219_DAI_CLK_MODE);
|
||||
|
||||
switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) {
|
||||
|
@ -361,7 +361,7 @@ static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
|
||||
unsigned int reg = enum_ctrl->reg;
|
||||
int val;
|
||||
|
||||
val = snd_soc_component_read32(component, reg) & DA732X_HPF_MASK;
|
||||
val = snd_soc_component_read(component, reg) & DA732X_HPF_MASK;
|
||||
|
||||
switch (val) {
|
||||
case DA732X_HPF_VOICE_EN:
|
||||
@ -1287,9 +1287,9 @@ static void da732x_dac_offset_adjust(struct snd_soc_component *component)
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
/* Check DAC offset sign */
|
||||
sign[DA732X_HPL_DAC] = (snd_soc_component_read32(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
sign[DA732X_HPL_DAC] = (snd_soc_component_read(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO);
|
||||
sign[DA732X_HPR_DAC] = (snd_soc_component_read32(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
sign[DA732X_HPR_DAC] = (snd_soc_component_read(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO);
|
||||
|
||||
/* Binary search DAC offset values (both channels at once) */
|
||||
@ -1306,10 +1306,10 @@ static void da732x_dac_offset_adjust(struct snd_soc_component *component)
|
||||
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
if ((snd_soc_component_read32(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
if ((snd_soc_component_read(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
|
||||
offset[DA732X_HPL_DAC] &= ~step;
|
||||
if ((snd_soc_component_read32(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
if ((snd_soc_component_read(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
|
||||
offset[DA732X_HPR_DAC] &= ~step;
|
||||
|
||||
@ -1350,9 +1350,9 @@ static void da732x_output_offset_adjust(struct snd_soc_component *component)
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
/* Check output offset sign */
|
||||
sign[DA732X_HPL_AMP] = snd_soc_component_read32(component, DA732X_REG_HPL) &
|
||||
sign[DA732X_HPL_AMP] = snd_soc_component_read(component, DA732X_REG_HPL) &
|
||||
DA732X_HP_OUT_COMPO;
|
||||
sign[DA732X_HPR_AMP] = snd_soc_component_read32(component, DA732X_REG_HPR) &
|
||||
sign[DA732X_HPR_AMP] = snd_soc_component_read(component, DA732X_REG_HPR) &
|
||||
DA732X_HP_OUT_COMPO;
|
||||
|
||||
snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
|
||||
@ -1373,10 +1373,10 @@ static void da732x_output_offset_adjust(struct snd_soc_component *component)
|
||||
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
if ((snd_soc_component_read32(component, DA732X_REG_HPL) &
|
||||
if ((snd_soc_component_read(component, DA732X_REG_HPL) &
|
||||
DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
|
||||
offset[DA732X_HPL_AMP] &= ~step;
|
||||
if ((snd_soc_component_read32(component, DA732X_REG_HPR) &
|
||||
if ((snd_soc_component_read(component, DA732X_REG_HPR) &
|
||||
DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
|
||||
offset[DA732X_HPR_AMP] &= ~step;
|
||||
|
||||
|
@ -461,12 +461,12 @@ static int da9055_get_alc_data(struct snd_soc_component *component, u8 reg_val)
|
||||
/* Select middle 8 bits for read back from data register */
|
||||
snd_soc_component_write(component, DA9055_ALC_CIC_OP_LVL_CTRL,
|
||||
reg_val | DA9055_ALC_DATA_MIDDLE);
|
||||
mid_data = snd_soc_component_read32(component, DA9055_ALC_CIC_OP_LVL_DATA);
|
||||
mid_data = snd_soc_component_read(component, DA9055_ALC_CIC_OP_LVL_DATA);
|
||||
|
||||
/* Select top 8 bits for read back from data register */
|
||||
snd_soc_component_write(component, DA9055_ALC_CIC_OP_LVL_CTRL,
|
||||
reg_val | DA9055_ALC_DATA_TOP);
|
||||
top_data = snd_soc_component_read32(component, DA9055_ALC_CIC_OP_LVL_DATA);
|
||||
top_data = snd_soc_component_read(component, DA9055_ALC_CIC_OP_LVL_DATA);
|
||||
|
||||
sum += ((mid_data << 8) | (top_data << 16));
|
||||
}
|
||||
@ -488,8 +488,8 @@ static int da9055_put_alc_sw(struct snd_kcontrol *kcontrol,
|
||||
*/
|
||||
|
||||
/* Save current values from Mic control registers */
|
||||
mic_left = snd_soc_component_read32(component, DA9055_MIC_L_CTRL);
|
||||
mic_right = snd_soc_component_read32(component, DA9055_MIC_R_CTRL);
|
||||
mic_left = snd_soc_component_read(component, DA9055_MIC_L_CTRL);
|
||||
mic_right = snd_soc_component_read(component, DA9055_MIC_R_CTRL);
|
||||
|
||||
/* Mute Mic PGA Left and Right */
|
||||
snd_soc_component_update_bits(component, DA9055_MIC_L_CTRL,
|
||||
@ -498,8 +498,8 @@ static int da9055_put_alc_sw(struct snd_kcontrol *kcontrol,
|
||||
DA9055_MIC_R_MUTE_EN, DA9055_MIC_R_MUTE_EN);
|
||||
|
||||
/* Save current values from ADC control registers */
|
||||
adc_left = snd_soc_component_read32(component, DA9055_ADC_L_CTRL);
|
||||
adc_right = snd_soc_component_read32(component, DA9055_ADC_R_CTRL);
|
||||
adc_left = snd_soc_component_read(component, DA9055_ADC_L_CTRL);
|
||||
adc_right = snd_soc_component_read(component, DA9055_ADC_R_CTRL);
|
||||
|
||||
/* Enable ADC Left and Right */
|
||||
snd_soc_component_update_bits(component, DA9055_ADC_L_CTRL,
|
||||
@ -1176,7 +1176,7 @@ static int da9055_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
|
||||
}
|
||||
|
||||
/* Don't allow change of mode if PLL is enabled */
|
||||
if ((snd_soc_component_read32(component, DA9055_PLL_CTRL) & DA9055_PLL_EN) &&
|
||||
if ((snd_soc_component_read(component, DA9055_PLL_CTRL) & DA9055_PLL_EN) &&
|
||||
(da9055->master != mode))
|
||||
return -EINVAL;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user