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bus:qcom : Fix typo in qcom,ebi2.txt

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This patch fix 2 spelling typos found in qcom,ebi2.txt

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Masanari Iida 2017-01-05 23:43:07 +09:00 committed by Rob Herring
parent 24f56ea66d
commit 2956b338b7
1 changed files with 3 additions and 3 deletions
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6
Documentation/devicetree/bindings/bus/qcom,ebi2.txt
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@ -51,7 +51,7 @@ Required properties:
- compatible: should be one of: - compatible: should be one of:
"qcom,msm8660-ebi2" "qcom,msm8660-ebi2"
"qcom,apq8060-ebi2" "qcom,apq8060-ebi2"
- #address-cells: shoule be <2>: the first cell is the chipselect, - #address-cells: should be <2>: the first cell is the chipselect,
the second cell is the offset inside the memory range the second cell is the offset inside the memory range
- #size-cells: should be <1> - #size-cells: should be <1>
- ranges: should be set to: - ranges: should be set to:
@ -64,7 +64,7 @@ Required properties:
- reg: two ranges of registers: EBI2 config and XMEM config areas - reg: two ranges of registers: EBI2 config and XMEM config areas
- reg-names: should be "ebi2", "xmem" - reg-names: should be "ebi2", "xmem"
- clocks: two clocks, EBI_2X and EBI - clocks: two clocks, EBI_2X and EBI
- clock-names: shoule be "ebi2x", "ebi2" - clock-names: should be "ebi2x", "ebi2"
Optional subnodes: Optional subnodes:
- Nodes inside the EBI2 will be considered device nodes. - Nodes inside the EBI2 will be considered device nodes.
@ -100,7 +100,7 @@ Optional properties arrays for FAST chip selects:
assertion, with respect to the cycle where ADV (address valid) is asserted. assertion, with respect to the cycle where ADV (address valid) is asserted.
2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3. 2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3.
- qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a - qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a
read transfer. For a single read trandfer this will be the time from CS read transfer. For a single read transfer this will be the time from CS
assertion to OE assertion. Valid values 0 thru 15. assertion to OE assertion. Valid values 0 thru 15.