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pmdomain: starfive: Extract JH7110 pmu private operations

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Move JH7110 private operation into private data of compatible. Convenient
to add AON PMU which would not have interrupts property.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230913-slideshow-luckiness-38ff17de84c6@spud
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Changhuang Liang 2023-09-13 14:54:27 +01:00 committed by Ulf Hansson
parent 6238fda156
commit 296eea5612
1 changed files with 62 additions and 27 deletions
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89
drivers/pmdomain/starfive/jh71xx-pmu.c
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@ -50,9 +50,17 @@ struct jh71xx_domain_info {
u8 bit;
};
struct jh71xx_pmu;
struct jh71xx_pmu_dev;
struct jh71xx_pmu_match_data {
const struct jh71xx_domain_info *domain_info;
int num_domains;
unsigned int pmu_status;
int (*pmu_parse_irq)(struct platform_device *pdev,
struct jh71xx_pmu *pmu);
int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd,
u32 mask, bool on);
};
struct jh71xx_pmu {
@ -78,12 +86,12 @@ static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool *is_o
if (!mask)
return -EINVAL;
*is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask;
*is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask;
return 0;
}
static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
unsigned long flags;
@ -91,22 +99,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
u32 mode;
u32 encourage_lo;
u32 encourage_hi;
bool is_on;
int ret;
ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
if (ret) {
dev_dbg(pmu->dev, "unable to get current state for %s\n",
pmd->genpd.name);
return ret;
}
if (is_on == on) {
dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
pmd->genpd.name, on ? "en" : "dis");
return 0;
}
spin_lock_irqsave(&pmu->lock, flags);
/*
@ -165,6 +159,29 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
return 0;
}
static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
const struct jh71xx_pmu_match_data *match_data = pmu->match_data;
bool is_on;
int ret;
ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
if (ret) {
dev_dbg(pmu->dev, "unable to get current state for %s\n",
pmd->genpd.name);
return ret;
}
if (is_on == on) {
dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
pmd->genpd.name, on ? "en" : "dis");
return 0;
}
return match_data->pmu_set_state(pmd, mask, on);
}
static int jh71xx_pmu_on(struct generic_pm_domain *genpd)
{
struct jh71xx_pmu_dev *pmd = container_of(genpd,
@ -225,6 +242,25 @@ static irqreturn_t jh71xx_pmu_interrupt(int irq, void *data)
return IRQ_HANDLED;
}
static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu)
{
struct device *dev = &pdev->dev;
int ret;
pmu->irq = platform_get_irq(pdev, 0);
if (pmu->irq < 0)
return pmu->irq;
ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
0, pdev->name, pmu);
if (ret)
dev_err(dev, "failed to request irq\n");
jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
return 0;
}
static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)
{
struct jh71xx_pmu_dev *pmd;
@ -274,19 +310,18 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
if (IS_ERR(pmu->base))
return PTR_ERR(pmu->base);
pmu->irq = platform_get_irq(pdev, 0);
if (pmu->irq < 0)
return pmu->irq;
ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
0, pdev->name, pmu);
if (ret)
dev_err(dev, "failed to request irq\n");
spin_lock_init(&pmu->lock);
match_data = of_device_get_match_data(dev);
if (!match_data)
return -EINVAL;
ret = match_data->pmu_parse_irq(pdev, pmu);
if (ret) {
dev_err(dev, "failed to parse irq\n");
return ret;
}
pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
sizeof(struct generic_pm_domain *),
GFP_KERNEL);
@ -306,9 +341,6 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
}
}
spin_lock_init(&pmu->lock);
jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
if (ret) {
dev_err(dev, "failed to register genpd driver: %d\n", ret);
@ -356,6 +388,9 @@ static const struct jh71xx_domain_info jh7110_power_domains[] = {
static const struct jh71xx_pmu_match_data jh7110_pmu = {
.num_domains = ARRAY_SIZE(jh7110_power_domains),
.domain_info = jh7110_power_domains,
.pmu_status = JH71XX_PMU_CURR_POWER_MODE,
.pmu_parse_irq = jh7110_pmu_parse_irq,
.pmu_set_state = jh7110_pmu_set_state,
};
static const struct of_device_id jh71xx_pmu_of_match[] = {