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phy: mediatek: hdmi: remove register access helpers

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Remove private register access helpers, use the common ones instead.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220920090038.15133-13-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Chunfeng Yun 2022-09-20 17:00:32 +08:00 committed by Vinod Koul
parent 0fb5e57e67
commit 299a9c72ac
2 changed files with 0 additions and 40 deletions
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33
drivers/phy/mediatek/phy-mtk-hdmi.c
View File

@ -15,39 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 bits)
{
void __iomem *reg = hdmi_phy->regs + offset;
u32 tmp;
tmp = readl(reg);
tmp &= ~bits;
writel(tmp, reg);
}
void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 bits)
{
void __iomem *reg = hdmi_phy->regs + offset;
u32 tmp;
tmp = readl(reg);
tmp |= bits;
writel(tmp, reg);
}
void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 val, u32 mask)
{
void __iomem *reg = hdmi_phy->regs + offset;
u32 tmp;
tmp = readl(reg);
tmp = (tmp & ~mask) | (val & mask);
writel(tmp, reg);
}
inline struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw) inline struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw)
{ {
return container_of(hw, struct mtk_hdmi_phy, pll_hw); return container_of(hw, struct mtk_hdmi_phy, pll_hw);

7
drivers/phy/mediatek/phy-mtk-hdmi.h
View File

@ -9,7 +9,6 @@
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/of_device.h> #include <linux/of_device.h>
@ -42,12 +41,6 @@ struct mtk_hdmi_phy {
unsigned int ibias_up; unsigned int ibias_up;
}; };
void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 bits);
void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 bits);
void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
u32 val, u32 mask);
struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;