powerpc: Fix objtool unannotated intra-function call warnings
Objtool throws unannotated intra-function call warnings in the following assembly files: arch/powerpc/kernel/vector.o: warning: objtool: .text+0x53c: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0x60: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0x124: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0x5d4: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0x5dc: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0xcb8: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0xd0c: unannotated intra-function call arch/powerpc/kvm/book3s_hv_rmhandlers.o: warning: objtool: .text+0x1030: unannotated intra-function call arch/powerpc/kernel/head_64.o: warning: objtool: .text+0x358: unannotated intra-function call arch/powerpc/kernel/head_64.o: warning: objtool: .text+0x728: unannotated intra-function call arch/powerpc/kernel/head_64.o: warning: objtool: .text+0x4d94: unannotated intra-function call arch/powerpc/kernel/head_64.o: warning: objtool: .text+0x4ec4: unannotated intra-function call arch/powerpc/kvm/book3s_hv_interrupts.o: warning: objtool: .text+0x6c: unannotated intra-function call arch/powerpc/kernel/misc_64.o: warning: objtool: .text+0x64: unannotated intra-function call Objtool does not add STT_NOTYPE symbols with size 0 to the rbtree, which is why find_call_destination() function is not able to find the destination symbol for 'bl' instruction. For such symbols, objtool is throwing unannotated intra-function call warnings in assembly files. Fix these warnings by annotating those symbols with SYM_FUNC_START_LOCAL and SYM_FUNC_END macros, inorder to set symbol type to STT_FUNC and symbol size accordingly. Tested-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Reviewed-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Sathvika Vasireddy <sv@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20221114175754.1131267-4-sv@linux.ibm.com
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@ -13,6 +13,7 @@
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*
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*/
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#include <linux/linkage.h>
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#include <asm/hw_irq.h>
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#include <asm/exception-64s.h>
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#include <asm/ptrace.h>
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@ -3112,7 +3113,7 @@ _GLOBAL(enable_machine_check)
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blr
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/* MSR[RI] should be clear because this uses SRR[01] */
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disable_machine_check:
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SYM_FUNC_START_LOCAL(disable_machine_check)
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mflr r0
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bcl 20,31,$+4
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0: mflr r3
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@ -3125,3 +3126,4 @@ disable_machine_check:
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RFI_TO_KERNEL
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1: mtlr r0
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blr
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SYM_FUNC_END(disable_machine_check)
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@ -18,6 +18,7 @@
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* variants.
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*/
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#include <linux/linkage.h>
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#include <linux/threads.h>
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#include <linux/init.h>
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#include <asm/reg.h>
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@ -462,7 +463,7 @@ generic_secondary_common_init:
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* Assumes we're mapped EA == RA if the MMU is on.
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*/
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#ifdef CONFIG_PPC_BOOK3S
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__mmu_off:
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SYM_FUNC_START_LOCAL(__mmu_off)
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mfmsr r3
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andi. r0,r3,MSR_IR|MSR_DR
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beqlr
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@ -473,6 +474,7 @@ __mmu_off:
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sync
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rfid
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b . /* prevent speculative execution */
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SYM_FUNC_END(__mmu_off)
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#endif
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@ -869,7 +871,7 @@ _GLOBAL(start_secondary_resume)
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/*
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* This subroutine clobbers r11 and r12
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*/
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enable_64b_mode:
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SYM_FUNC_START_LOCAL(enable_64b_mode)
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mfmsr r11 /* grab the current MSR */
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#ifdef CONFIG_PPC_BOOK3E_64
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oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
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@ -881,6 +883,7 @@ enable_64b_mode:
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isync
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#endif
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blr
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SYM_FUNC_END(enable_64b_mode)
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/*
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* This puts the TOC pointer into r2, offset by 0x8000 (as expected
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@ -9,6 +9,7 @@
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*/
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#include <linux/linkage.h>
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#include <linux/sys.h>
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#include <asm/unistd.h>
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#include <asm/errno.h>
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@ -353,7 +354,7 @@ _GLOBAL(kexec_smp_wait)
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*
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* don't overwrite r3 here, it is live for kexec_wait above.
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*/
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real_mode: /* assume normal blr return */
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SYM_FUNC_START_LOCAL(real_mode) /* assume normal blr return */
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#ifdef CONFIG_PPC_BOOK3E_64
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/* Create an identity mapping. */
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b kexec_create_tlb
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@ -370,6 +371,7 @@ real_mode: /* assume normal blr return */
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mtspr SPRN_SRR0,r11
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rfid
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#endif
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SYM_FUNC_END(real_mode)
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/*
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* kexec_sequence(newstack, start, image, control, clear_all(),
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@ -1,4 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/reg.h>
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@ -185,7 +186,7 @@ fphalf:
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* Internal routine to enable floating point and set FPSCR to 0.
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* Don't call it from C; it doesn't use the normal calling convention.
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*/
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fpenable:
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SYM_FUNC_START_LOCAL(fpenable)
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#ifdef CONFIG_PPC32
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stwu r1,-64(r1)
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#else
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@ -202,6 +203,7 @@ fpenable:
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mffs fr31
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MTFSF_L(fr1)
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blr
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SYM_FUNC_END(fpenable)
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fpdisable:
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mtlr r12
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@ -9,6 +9,7 @@
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <linux/linkage.h>
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#include <asm/ppc_asm.h>
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#include <asm/kvm_asm.h>
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#include <asm/reg.h>
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@ -107,7 +108,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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/*
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* void kvmhv_save_host_pmu(void)
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*/
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kvmhv_save_host_pmu:
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SYM_FUNC_START_LOCAL(kvmhv_save_host_pmu)
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BEGIN_FTR_SECTION
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/* Work around P8 PMAE bug */
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li r3, -1
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@ -154,3 +155,4 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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stw r8, HSTATE_PMC5(r13)
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stw r9, HSTATE_PMC6(r13)
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31: blr
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SYM_FUNC_END(kvmhv_save_host_pmu)
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@ -10,6 +10,7 @@
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <linux/linkage.h>
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#include <asm/ppc_asm.h>
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#include <asm/code-patching-asm.h>
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#include <asm/kvm_asm.h>
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@ -2358,7 +2359,7 @@ hmi_realmode:
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* This routine calls kvmppc_read_intr, a C function, if an external
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* interrupt is pending.
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*/
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kvmppc_check_wake_reason:
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SYM_FUNC_START_LOCAL(kvmppc_check_wake_reason)
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mfspr r6, SPRN_SRR1
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BEGIN_FTR_SECTION
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rlwinm r6, r6, 45-31, 0xf /* extract wake reason field (P8) */
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@ -2427,6 +2428,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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addi r1, r1, PPC_MIN_STKFRM
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mtlr r0
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blr
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SYM_FUNC_END(kvmppc_check_wake_reason)
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/*
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* Save away FP, VMX and VSX registers.
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@ -2434,7 +2436,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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* N.B. r30 and r31 are volatile across this function,
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* thus it is not callable from C.
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*/
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kvmppc_save_fp:
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SYM_FUNC_START_LOCAL(kvmppc_save_fp)
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mflr r30
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mr r31,r3
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mfmsr r5
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@ -2462,6 +2464,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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stw r6,VCPU_VRSAVE(r31)
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mtlr r30
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blr
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SYM_FUNC_END(kvmppc_save_fp)
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/*
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* Load up FP, VMX and VSX registers
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@ -2469,7 +2472,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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* N.B. r30 and r31 are volatile across this function,
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* thus it is not callable from C.
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*/
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kvmppc_load_fp:
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SYM_FUNC_START_LOCAL(kvmppc_load_fp)
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mflr r30
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mr r31,r4
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mfmsr r9
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@ -2498,6 +2501,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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mtlr r30
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mr r4,r31
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blr
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SYM_FUNC_END(kvmppc_load_fp)
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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/*
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@ -2746,7 +2750,7 @@ kvmppc_bad_host_intr:
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* r9 has a vcpu pointer (in)
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* r0 is used as a scratch register
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*/
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kvmppc_msr_interrupt:
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SYM_FUNC_START_LOCAL(kvmppc_msr_interrupt)
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rldicl r0, r11, 64 - MSR_TS_S_LG, 62
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cmpwi r0, 2 /* Check if we are in transactional state.. */
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ld r11, VCPU_INTR_MSR(r9)
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@ -2755,13 +2759,14 @@ kvmppc_msr_interrupt:
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li r0, 1
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1: rldimi r11, r0, MSR_TS_S_LG, 63 - MSR_TS_T_LG
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blr
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SYM_FUNC_END(kvmppc_msr_interrupt)
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/*
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* void kvmhv_load_guest_pmu(struct kvm_vcpu *vcpu)
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*
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* Load up guest PMU state. R3 points to the vcpu struct.
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*/
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kvmhv_load_guest_pmu:
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SYM_FUNC_START_LOCAL(kvmhv_load_guest_pmu)
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mr r4, r3
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mflr r0
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li r3, 1
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@ -2811,13 +2816,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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isync
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mtlr r0
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blr
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SYM_FUNC_END(kvmhv_load_guest_pmu)
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/*
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* void kvmhv_load_host_pmu(void)
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*
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* Reload host PMU state saved in the PACA by kvmhv_save_host_pmu.
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*/
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kvmhv_load_host_pmu:
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SYM_FUNC_START_LOCAL(kvmhv_load_host_pmu)
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mflr r0
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lbz r4, PACA_PMCINUSE(r13) /* is the host using the PMU? */
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cmpwi r4, 0
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@ -2859,6 +2865,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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isync
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mtlr r0
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23: blr
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SYM_FUNC_END(kvmhv_load_host_pmu)
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/*
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* void kvmhv_save_guest_pmu(struct kvm_vcpu *vcpu, bool pmu_in_use)
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@ -2866,7 +2873,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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* Save guest PMU state into the vcpu struct.
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* r3 = vcpu, r4 = full save flag (PMU in use flag set in VPA)
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*/
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kvmhv_save_guest_pmu:
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SYM_FUNC_START_LOCAL(kvmhv_save_guest_pmu)
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mr r9, r3
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mr r8, r4
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BEGIN_FTR_SECTION
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@ -2942,6 +2949,7 @@ BEGIN_FTR_SECTION
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mtspr SPRN_MMCRS, r4
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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22: blr
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SYM_FUNC_END(kvmhv_save_guest_pmu)
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/*
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* This works around a hardware bug on POWER8E processors, where
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