perf/x86/intel: Fix regression by default disabling perfmon v4 interrupt handling
Kyle Huey reported that 'rr', a replay debugger, broke due to the following commit: af3bdb991a5c ("perf/x86/intel: Add a separate Arch Perfmon v4 PMI handler") Rework the 'disable_counter_freezing' __setup() parameter such that we can explicitly enable/disable it and switch to default disabled. To this purpose, rename the parameter to "perf_v4_pmi=" which is a much better description and allows requiring a bool argument. [ mingo: Improved the changelog some more. ] Reported-by: Kyle Huey <me@kylehuey.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Robert O'Callahan <robert@ocallahan.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: acme@kernel.org Link: http://lkml.kernel.org/r/20181120170842.GZ2131@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
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2a5bf23d5b
@ -856,7 +856,8 @@
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causing system reset or hang due to sending
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INIT from AP to BSP.
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disable_counter_freezing [HW]
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perf_v4_pmi= [X86,INTEL]
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Format: <bool>
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Disable Intel PMU counter freezing feature.
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The feature only exists starting from
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Arch Perfmon v4 (Skylake and newer).
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@ -2306,14 +2306,18 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
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return handled;
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}
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static bool disable_counter_freezing;
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static bool disable_counter_freezing = true;
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static int __init intel_perf_counter_freezing_setup(char *s)
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{
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disable_counter_freezing = true;
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pr_info("Intel PMU Counter freezing feature disabled\n");
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bool res;
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if (kstrtobool(s, &res))
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return -EINVAL;
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disable_counter_freezing = !res;
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return 1;
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}
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__setup("disable_counter_freezing", intel_perf_counter_freezing_setup);
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__setup("perf_v4_pmi=", intel_perf_counter_freezing_setup);
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/*
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* Simplified handler for Arch Perfmon v4:
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