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arm64: dts: qcom: sc7180: rename labels for DSI nodes

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Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-8-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
2023-05-31 04:16:16 +03:00
committed by Bjorn Andersson
parent 8b764ed0d0
commit 2b616f86d5
10 changed files with 121 additions and 121 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
View File

@ -143,21 +143,6 @@
};
};
&dsi0 {
vdda-supply = <&vreg_l3c_1p2>;
status = "okay";
};
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
&dsi_phy {
vdds-supply = <&vreg_l4a_0p8>;
status = "okay";
};
&i2c2 {
clock-frequency = <400000>;
status = "okay";
@ -269,7 +254,7 @@
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
@ -313,6 +298,21 @@
status = "okay";
};
&mdss_dsi0 {
vdda-supply = <&vreg_l3c_1p2>;
status = "okay";
};
&mdss_dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vdds-supply = <&vreg_l4a_0p8>;
status = "okay";
};
&pm6150_adc {
thermistor@4e {
reg = <ADC5_AMUX_THM2_100K_PU>;

14
arch/arm64/boot/dts/qcom/sc7180-idp.dts
View File

@ -295,7 +295,11 @@
};
};
&dsi0 {
&mdss {
status = "okay";
};
&mdss_dsi0 {
status = "okay";
vdda-supply = <&vreg_l3c_1p2>;
@ -314,7 +318,7 @@
port {
panel0_in: endpoint {
remote-endpoint = <&dsi0_out>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
@ -329,15 +333,11 @@
};
};
&dsi_phy {
&mdss_dsi0_phy {
status = "okay";
vdds-supply = <&vreg_l4a_0p8>;
};
&mdss {
status = "okay";
};
&qfprom {
vcc-supply = <&vreg_l11a_1p8>;
};

10
arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
View File

@ -46,10 +46,6 @@
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&ps8640_in>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
@ -74,7 +70,7 @@ edp_brij_i2c: &i2c2 {
port@0 {
reg = <0>;
ps8640_in: endpoint {
remote-endpoint = <&dsi0_out>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
@ -102,6 +98,10 @@ edp_brij_i2c: &i2c2 {
};
};
&mdss_dsi0_out {
remote-endpoint = <&ps8640_in>;
};
&tlmm {
edp_brij_ps8640_rst: edp-brij-ps8640-rst-state {
pins = "gpio11";

2
arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick-r0.dts
View File

@ -15,7 +15,7 @@
compatible = "google,quackingstick-sku1537", "qcom,sc7180";
};
&dsi_phy {
&mdss_dsi0_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-drive-ldo-level = <375>;

60
arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
View File

@ -52,36 +52,6 @@
};
};
&dsi0 {
panel: panel@0 {
/* Compatible will be filled in per-board */
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst>;
avdd-supply = <&ppvar_lcd>;
pp1800-supply = <&v1p8_disp>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&gpio_keys {
status = "okay";
};
@ -106,6 +76,36 @@
};
};
&mdss_dsi0 {
panel: panel@0 {
/* Compatible will be filled in per-board */
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst>;
avdd-supply = <&ppvar_lcd>;
pp1800-supply = <&v1p8_disp>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
port {
panel_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&sdhc_2 {
status = "okay";
};

10
arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi
View File

@ -27,10 +27,6 @@
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
@ -65,7 +61,7 @@ edp_brij_i2c: &i2c2 {
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
remote-endpoint = <&mdss_dsi0_out>;
};
};
@ -95,6 +91,10 @@ edp_brij_i2c: &i2c2 {
};
};
&mdss_dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
};
&tlmm {
edp_brij_irq: edp-brij-irq-state {
pins = "gpio11";

2
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev1-boe.dts
View File

@ -17,7 +17,7 @@
compatible = "google,wormdingler-sku1024", "qcom,sc7180";
};
&dsi_phy {
&mdss_dsi0_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-drive-ldo-level = <450>;

62
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi
View File

@ -110,37 +110,6 @@
};
};
&dsi0 {
panel: panel@0 {
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_reset_1800>;
avdd-supply = <&avdd_lcd>;
avee-supply = <&avee_lcd>;
pp1800-supply = <&v1p8_mipi>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
@ -162,6 +131,37 @@
};
};
&mdss_dsi0 {
panel: panel@0 {
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_reset_1800>;
avdd-supply = <&avdd_lcd>;
avee-supply = <&avee_lcd>;
pp1800-supply = <&v1p8_mipi>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
port {
panel_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&pm6150_adc {
skin-temp-thermistor@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;

28
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View File

@ -705,20 +705,6 @@ ap_h1_spi: &spi0 {
status = "disabled";
};
&dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
};
&dsi0_out {
data-lanes = <0 1 2 3>;
};
&dsi_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
ap_sar_sensor_i2c: &i2c5 {
clock-frequency = <400000>;
@ -836,6 +822,20 @@ hp_i2c: &i2c9 {
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
};
&mdss_dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
};
&mdss_dsi0_out {
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
&pm6150_adc {
charger-thermistor@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;

22
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -2996,7 +2996,7 @@
port@0 {
reg = <0>;
dpu_intf1_out: endpoint {
remote-endpoint = <&dsi0_in>;
remote-endpoint = <&mdss_dsi0_in>;
};
};
@ -3033,7 +3033,7 @@
};
};
dsi0: dsi@ae94000 {
mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sc7180-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
@ -3056,12 +3056,12 @@
"bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SC7180_CX>;
phys = <&dsi_phy>;
phys = <&mdss_dsi0_phy>;
#address-cells = <1>;
#size-cells = <0>;
@ -3074,14 +3074,14 @@
port@0 {
reg = <0>;
dsi0_in: endpoint {
mdss_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
mdss_dsi0_out: endpoint {
};
};
};
@ -3106,13 +3106,13 @@
};
};
dsi_phy: phy@ae94400 {
mdss_dsi0_phy: phy@ae94400 {
compatible = "qcom,dsi-phy-10nm";
reg = <0 0x0ae94400 0 0x200>,
<0 0x0ae94600 0 0x280>,
<0 0x0ae94a00 0 0x1e0>;
reg-names = "dsi_phy",
"dsi_phy_lane",
reg-names = "dsi0_phy",
"dsi0_phy_lane",
"dsi_pll";
#clock-cells = <1>;
@ -3203,8 +3203,8 @@
reg = <0 0x0af00000 0 0x200000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
<&dsi_phy 0>,
<&dsi_phy 1>,
<&mdss_dsi0_phy 0>,
<&mdss_dsi0_phy 1>,
<&dp_phy 0>,
<&dp_phy 1>;
clock-names = "bi_tcxo",