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brcm80211: fmac: move chip reset core function to sdio_chip.c

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This patch is part of the abstracting chip backplane handle code
series.

Reviewed-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Franky Lin 2011-11-04 22:23:38 +01:00 committed by John W. Linville
parent 454d2a8816
commit 2bc78e10d8
3 changed files with 49 additions and 47 deletions
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49
drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
View File

@ -3090,51 +3090,6 @@ static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
return bcmerror; return bcmerror;
} }
static void
brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
{
u32 regdata;
/*
* Must do the disable sequence first to work for
* arbitrary current core state.
*/
brcmf_sdio_chip_coredisable(sdiodev, corebase);
/*
* Now do the initialization sequence.
* set reset while enabling the clock and
* forcing them on throughout the core
*/
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
SBTML_RESET);
udelay(1);
regdata = brcmf_sdcard_reg_read(sdiodev,
CORE_SB(corebase, sbtmstatehigh), 4);
if (regdata & SBTMH_SERR)
brcmf_sdcard_reg_write(sdiodev,
CORE_SB(corebase, sbtmstatehigh), 4, 0);
regdata = brcmf_sdcard_reg_read(sdiodev,
CORE_SB(corebase, sbimstate), 4);
if (regdata & (SBIM_IBE | SBIM_TO))
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4,
regdata & ~(SBIM_IBE | SBIM_TO));
/* clear reset and allow it to propagate throughout the core */
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_FGC << SBTML_SICF_SHIFT) |
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
/* leave clock enabled */
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
}
static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
{ {
uint retries; uint retries;
@ -3149,7 +3104,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
brcmf_sdio_chip_coredisable(bus->sdiodev, brcmf_sdio_chip_coredisable(bus->sdiodev,
bus->ci->armcorebase); bus->ci->armcorebase);
brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase); brcmf_sdio_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase);
/* Clear the top bit of memory */ /* Clear the top bit of memory */
if (bus->ramsize) { if (bus->ramsize) {
@ -3174,7 +3129,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
w_sdreg32(bus, 0xFFFFFFFF, w_sdreg32(bus, 0xFFFFFFFF,
offsetof(struct sdpcmd_regs, intstatus), &retries); offsetof(struct sdpcmd_regs, intstatus), &retries);
brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->armcorebase); brcmf_sdio_chip_resetcore(bus->sdiodev, bus->ci->armcorebase);
/* Allow HT Clock now that the ARM is running. */ /* Allow HT Clock now that the ARM is running. */
bus->alp_only = false; bus->alp_only = false;

45
drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
View File

@ -155,6 +155,51 @@ brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, u32 corebase)
udelay(1); udelay(1);
} }
void
brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
{
u32 regdata;
/*
* Must do the disable sequence first to work for
* arbitrary current core state.
*/
brcmf_sdio_chip_coredisable(sdiodev, corebase);
/*
* Now do the initialization sequence.
* set reset while enabling the clock and
* forcing them on throughout the core
*/
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
SBTML_RESET);
udelay(1);
regdata = brcmf_sdcard_reg_read(sdiodev,
CORE_SB(corebase, sbtmstatehigh), 4);
if (regdata & SBTMH_SERR)
brcmf_sdcard_reg_write(sdiodev,
CORE_SB(corebase, sbtmstatehigh), 4, 0);
regdata = brcmf_sdcard_reg_read(sdiodev,
CORE_SB(corebase, sbimstate), 4);
if (regdata & (SBIM_IBE | SBIM_TO))
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbimstate), 4,
regdata & ~(SBIM_IBE | SBIM_TO));
/* clear reset and allow it to propagate throughout the core */
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_FGC << SBTML_SICF_SHIFT) |
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
/* leave clock enabled */
brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
}
static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev, static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,
struct chip_info *ci, u32 regs) struct chip_info *ci, u32 regs)
{ {

2
drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h
View File

@ -133,6 +133,8 @@ struct sbconfig {
u32 sbidhigh; /* identification */ u32 sbidhigh; /* identification */
}; };
extern void brcmf_sdio_chip_resetcore(struct brcmf_sdio_dev *sdiodev,
u32 corebase);
extern bool brcmf_sdio_chip_iscoreup(struct brcmf_sdio_dev *sdiodev, extern bool brcmf_sdio_chip_iscoreup(struct brcmf_sdio_dev *sdiodev,
u32 corebase); u32 corebase);
extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev,