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gpio: 104-idio-16: Migrate to the regmap API

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The regmap API supports IO port accessors so we can take advantage of
regmap abstractions rather than handling access to the device registers
directly in the driver. Migrate the 104-idio-16 module to the new
idio-16 library interface leveraging the gpio-regmap API.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/1f24a1f18c9a9daa4983713e0a5b53e838d624a8.1680618405.git.william.gray@linaro.org/
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
William Breathitt Gray 2023-08-10 18:00:39 -04:00 committed by Bartosz Golaszewski
parent db02247827
commit 2c210c9a34
2 changed files with 64 additions and 224 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpio/Kconfig
View File

@ -872,7 +872,7 @@ config GPIO_104_IDIO_16
tristate "ACCES 104-IDIO-16 GPIO support" tristate "ACCES 104-IDIO-16 GPIO support"
depends on PC104 depends on PC104
select ISA_BUS_API select ISA_BUS_API
select GPIOLIB_IRQCHIP select REGMAP_MMIO
select GPIO_IDIO_16 select GPIO_IDIO_16
help help
Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16, Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16,

286
drivers/gpio/gpio-104-idio-16.c
View File

@ -6,19 +6,16 @@
* This driver supports the following ACCES devices: 104-IDIO-16, * This driver supports the following ACCES devices: 104-IDIO-16,
* 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8. * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8.
*/ */
#include <linux/bitmap.h> #include <linux/bits.h>
#include <linux/device.h> #include <linux/device.h>
#include <linux/errno.h> #include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/io.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/interrupt.h> #include <linux/irq.h>
#include <linux/irqdesc.h>
#include <linux/isa.h> #include <linux/isa.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/moduleparam.h> #include <linux/moduleparam.h>
#include <linux/spinlock.h> #include <linux/regmap.h>
#include <linux/types.h> #include <linux/types.h>
#include "gpio-idio-16.h" #include "gpio-idio-16.h"
@ -36,187 +33,62 @@ static unsigned int num_irq;
module_param_hw_array(irq, uint, irq, &num_irq, 0); module_param_hw_array(irq, uint, irq, &num_irq, 0);
MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers"); MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers");
/** static const struct regmap_range idio_16_wr_ranges[] = {
* struct idio_16_gpio - GPIO device private data structure regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x4),
* @chip: instance of the gpio_chip };
* @lock: synchronization lock to prevent I/O race conditions static const struct regmap_range idio_16_rd_ranges[] = {
* @irq_mask: I/O bits affected by interrupts regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x5),
* @reg: I/O address offset for the device registers };
* @state: ACCES IDIO-16 device state static const struct regmap_range idio_16_precious_ranges[] = {
*/ regmap_reg_range(0x2, 0x2),
struct idio_16_gpio { };
struct gpio_chip chip; static const struct regmap_access_table idio_16_wr_table = {
raw_spinlock_t lock; .yes_ranges = idio_16_wr_ranges,
unsigned long irq_mask; .n_yes_ranges = ARRAY_SIZE(idio_16_wr_ranges),
struct idio_16 __iomem *reg; };
struct idio_16_state state; static const struct regmap_access_table idio_16_rd_table = {
.yes_ranges = idio_16_rd_ranges,
.n_yes_ranges = ARRAY_SIZE(idio_16_rd_ranges),
};
static const struct regmap_access_table idio_16_precious_table = {
.yes_ranges = idio_16_precious_ranges,
.n_yes_ranges = ARRAY_SIZE(idio_16_precious_ranges),
};
static const struct regmap_config idio_16_regmap_config = {
.reg_bits = 8,
.reg_stride = 1,
.val_bits = 8,
.io_port = true,
.wr_table = &idio_16_wr_table,
.rd_table = &idio_16_rd_table,
.volatile_table = &idio_16_rd_table,
.precious_table = &idio_16_precious_table,
.cache_type = REGCACHE_FLAT,
.use_raw_spinlock = true,
}; };
static int idio_16_gpio_get_direction(struct gpio_chip *chip, /* Only input lines (GPIO 16-31) support interrupts */
unsigned int offset) #define IDIO_16_REGMAP_IRQ(_id) \
{ [16 + _id] = { \
if (idio_16_get_direction(offset)) .mask = BIT(_id), \
return GPIO_LINE_DIRECTION_IN; .type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \
return GPIO_LINE_DIRECTION_OUT;
}
static int idio_16_gpio_direction_input(struct gpio_chip *chip,
unsigned int offset)
{
return 0;
}
static int idio_16_gpio_direction_output(struct gpio_chip *chip,
unsigned int offset, int value)
{
chip->set(chip, offset, value);
return 0;
}
static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset);
}
static int idio_16_gpio_get_multiple(struct gpio_chip *chip,
unsigned long *mask, unsigned long *bits)
{
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits);
return 0;
}
static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset,
int value)
{
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value);
}
static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
unsigned long *mask, unsigned long *bits)
{
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits);
}
static void idio_16_irq_ack(struct irq_data *data)
{
}
static void idio_16_irq_mask(struct irq_data *data)
{
struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
const unsigned long offset = irqd_to_hwirq(data);
unsigned long flags;
idio16gpio->irq_mask &= ~BIT(offset);
gpiochip_disable_irq(chip, offset);
if (!idio16gpio->irq_mask) {
raw_spin_lock_irqsave(&idio16gpio->lock, flags);
iowrite8(0, &idio16gpio->reg->irq_ctl);
raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
} }
}
static void idio_16_irq_unmask(struct irq_data *data) static const struct regmap_irq idio_16_regmap_irqs[] = {
{ IDIO_16_REGMAP_IRQ(0), IDIO_16_REGMAP_IRQ(1), IDIO_16_REGMAP_IRQ(2), /* 0-2 */
struct gpio_chip *chip = irq_data_get_irq_chip_data(data); IDIO_16_REGMAP_IRQ(3), IDIO_16_REGMAP_IRQ(4), IDIO_16_REGMAP_IRQ(5), /* 3-5 */
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); IDIO_16_REGMAP_IRQ(6), IDIO_16_REGMAP_IRQ(7), IDIO_16_REGMAP_IRQ(8), /* 6-8 */
const unsigned long offset = irqd_to_hwirq(data); IDIO_16_REGMAP_IRQ(9), IDIO_16_REGMAP_IRQ(10), IDIO_16_REGMAP_IRQ(11), /* 9-11 */
const unsigned long prev_irq_mask = idio16gpio->irq_mask; IDIO_16_REGMAP_IRQ(12), IDIO_16_REGMAP_IRQ(13), IDIO_16_REGMAP_IRQ(14), /* 12-14 */
unsigned long flags; IDIO_16_REGMAP_IRQ(15), /* 15 */
gpiochip_enable_irq(chip, offset);
idio16gpio->irq_mask |= BIT(offset);
if (!prev_irq_mask) {
raw_spin_lock_irqsave(&idio16gpio->lock, flags);
ioread8(&idio16gpio->reg->irq_ctl);
raw_spin_unlock_irqrestore(&idio16gpio->lock, flags);
}
}
static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_type)
{
/* The only valid irq types are none and both-edges */
if (flow_type != IRQ_TYPE_NONE &&
(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
return -EINVAL;
return 0;
}
static const struct irq_chip idio_16_irqchip = {
.name = "104-idio-16",
.irq_ack = idio_16_irq_ack,
.irq_mask = idio_16_irq_mask,
.irq_unmask = idio_16_irq_unmask,
.irq_set_type = idio_16_irq_set_type,
.flags = IRQCHIP_IMMUTABLE,
GPIOCHIP_IRQ_RESOURCE_HELPERS,
}; };
static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
{
struct idio_16_gpio *const idio16gpio = dev_id;
struct gpio_chip *const chip = &idio16gpio->chip;
int gpio;
for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
generic_handle_domain_irq(chip->irq.domain, gpio);
raw_spin_lock(&idio16gpio->lock);
iowrite8(0, &idio16gpio->reg->in0_7);
raw_spin_unlock(&idio16gpio->lock);
return IRQ_HANDLED;
}
#define IDIO_16_NGPIO 32
static const char *idio_16_names[IDIO_16_NGPIO] = {
"OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7",
"OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15",
"IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7",
"IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15"
};
static int idio_16_irq_init_hw(struct gpio_chip *gc)
{
struct idio_16_gpio *const idio16gpio = gpiochip_get_data(gc);
/* Disable IRQ by default */
iowrite8(0, &idio16gpio->reg->irq_ctl);
iowrite8(0, &idio16gpio->reg->in0_7);
return 0;
}
static int idio_16_probe(struct device *dev, unsigned int id) static int idio_16_probe(struct device *dev, unsigned int id)
{ {
struct idio_16_gpio *idio16gpio;
const char *const name = dev_name(dev); const char *const name = dev_name(dev);
struct gpio_irq_chip *girq; struct idio_16_regmap_config config = {};
int err; void __iomem *regs;
struct regmap *map;
idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL);
if (!idio16gpio)
return -ENOMEM;
if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) { if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) {
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
@ -224,54 +96,22 @@ static int idio_16_probe(struct device *dev, unsigned int id)
return -EBUSY; return -EBUSY;
} }
idio16gpio->reg = devm_ioport_map(dev, base[id], IDIO_16_EXTENT); regs = devm_ioport_map(dev, base[id], IDIO_16_EXTENT);
if (!idio16gpio->reg) if (!regs)
return -ENOMEM; return -ENOMEM;
idio16gpio->chip.label = name; map = devm_regmap_init_mmio(dev, regs, &idio_16_regmap_config);
idio16gpio->chip.parent = dev; if (IS_ERR(map))
idio16gpio->chip.owner = THIS_MODULE; return dev_err_probe(dev, PTR_ERR(map), "Unable to initialize register map\n");
idio16gpio->chip.base = -1;
idio16gpio->chip.ngpio = IDIO_16_NGPIO;
idio16gpio->chip.names = idio_16_names;
idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
idio16gpio->chip.get = idio_16_gpio_get;
idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple;
idio16gpio->chip.set = idio_16_gpio_set;
idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
idio_16_state_init(&idio16gpio->state); config.parent = dev;
/* FET off states are represented by bit values of "1" */ config.map = map;
bitmap_fill(idio16gpio->state.out_state, IDIO_16_NOUT); config.regmap_irqs = idio_16_regmap_irqs;
config.num_regmap_irqs = ARRAY_SIZE(idio_16_regmap_irqs);
config.irq = irq[id];
config.no_status = true;
girq = &idio16gpio->chip.irq; return devm_idio_16_regmap_register(dev, &config);
gpio_irq_chip_set_chip(girq, &idio_16_irqchip);
/* This will let us handle the parent IRQ in the driver */
girq->parent_handler = NULL;
girq->num_parents = 0;
girq->parents = NULL;
girq->default_type = IRQ_TYPE_NONE;
girq->handler = handle_edge_irq;
girq->init_hw = idio_16_irq_init_hw;
raw_spin_lock_init(&idio16gpio->lock);
err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio);
if (err) {
dev_err(dev, "GPIO registering failed (%d)\n", err);
return err;
}
err = devm_request_irq(dev, irq[id], idio_16_irq_handler, 0, name,
idio16gpio);
if (err) {
dev_err(dev, "IRQ handler registering failed (%d)\n", err);
return err;
}
return 0;
} }
static struct isa_driver idio_16_driver = { static struct isa_driver idio_16_driver = {