iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

powerpc/powernv/pci: Introduce __pnv_pci_ioda_msi_setup()

Browse Source 
It will be used as a 'compose_msg' handler of the MSI domain introduced
later.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210701132750.1475580-12-clg@kaod.org
This commit is contained in:
Cédric Le Goater 2021-07-01 15:27:29 +02:00 committed by Michael Ellerman
parent 174db9e7f7
commit 2c50d7e99e
1 changed files with 23 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
arch/powerpc/platforms/powernv/pci-ioda.c
View File

@ -2016,15 +2016,17 @@ bool is_pnv_opal_msi(struct irq_chip *chip)
} }
EXPORT_SYMBOL_GPL(is_pnv_opal_msi); EXPORT_SYMBOL_GPL(is_pnv_opal_msi);
static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev, static int __pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
unsigned int hwirq, unsigned int virq, unsigned int xive_num,
unsigned int is_64, struct msi_msg *msg) unsigned int is_64, struct msi_msg *msg)
{ {
struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev); struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
unsigned int xive_num = hwirq - phb->msi_base;
__be32 data; __be32 data;
int rc; int rc;
dev_dbg(&dev->dev, "%s: setup %s-bit MSI for vector #%d\n", __func__,
is_64 ? "64" : "32", xive_num);
/* No PE assigned ? bail out ... no MSI for you ! */ /* No PE assigned ? bail out ... no MSI for you ! */
if (pe == NULL) if (pe == NULL)
return -ENXIO; return -ENXIO;
@ -2072,12 +2074,28 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
} }
msg->data = be32_to_cpu(data); msg->data = be32_to_cpu(data);
return 0;
}
static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
unsigned int hwirq, unsigned int virq,
unsigned int is_64, struct msi_msg *msg)
{
struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
unsigned int xive_num = hwirq - phb->msi_base;
int rc;
rc = __pnv_pci_ioda_msi_setup(phb, dev, xive_num, is_64, msg);
if (rc)
return rc;
/* P8 only */
pnv_set_msi_irq_chip(phb, virq); pnv_set_msi_irq_chip(phb, virq);
pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d)," pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d),"
" address=%x_%08x data=%x PE# %x\n", " address=%x_%08x data=%x PE# %x\n",
pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num, pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num,
msg->address_hi, msg->address_lo, data, pe->pe_number); msg->address_hi, msg->address_lo, msg->data, pe->pe_number);
return 0; return 0;
} }