Merge branch 'mlxsw-remove-some-unused-code'
Petr Machata says:
====================
mlxsw: Remove some unused code
This patchset removes code that is not used anymore after the following two
commits removed all users:
- commit b0d80c013b04 ("mlxsw: Remove Mellanox SwitchX-2 ASIC support")
- commit 9b43fbb8ce24 ("mlxsw: Remove Mellanox SwitchIB ASIC support")
====================
Link: https://lore.kernel.org/r/cover.1661350629.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
2c58a91495
@ -1307,21 +1307,6 @@ mlxsw_devlink_sb_pool_set(struct devlink *devlink,
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extack);
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}
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static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
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enum devlink_port_type port_type)
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{
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struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
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struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
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struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
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if (!mlxsw_driver->port_type_set)
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return -EOPNOTSUPP;
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return mlxsw_driver->port_type_set(mlxsw_core,
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mlxsw_core_port->local_port,
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port_type);
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}
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static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
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unsigned int sb_index, u16 pool_index,
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u32 *p_threshold)
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@ -1652,7 +1637,6 @@ static const struct devlink_ops mlxsw_devlink_ops = {
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BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
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.reload_down = mlxsw_devlink_core_bus_device_reload_down,
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.reload_up = mlxsw_devlink_core_bus_device_reload_up,
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.port_type_set = mlxsw_devlink_port_type_set,
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.port_split = mlxsw_devlink_port_split,
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.port_unsplit = mlxsw_devlink_port_unsplit,
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.sb_pool_get = mlxsw_devlink_sb_pool_get,
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@ -3183,18 +3167,6 @@ void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
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}
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EXPORT_SYMBOL(mlxsw_core_port_eth_set);
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void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port,
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void *port_driver_priv)
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{
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struct mlxsw_core_port *mlxsw_core_port =
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&mlxsw_core->ports[local_port];
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struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
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mlxsw_core_port->port_driver_priv = port_driver_priv;
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devlink_port_type_ib_set(devlink_port, NULL);
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}
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EXPORT_SYMBOL(mlxsw_core_port_ib_set);
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void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
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void *port_driver_priv)
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{
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@ -3207,18 +3179,6 @@ void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
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}
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EXPORT_SYMBOL(mlxsw_core_port_clear);
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enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
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u16 local_port)
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{
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struct mlxsw_core_port *mlxsw_core_port =
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&mlxsw_core->ports[local_port];
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struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
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return devlink_port->type;
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}
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EXPORT_SYMBOL(mlxsw_core_port_type_get);
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struct devlink_port *
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mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
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u16 local_port)
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@ -264,12 +264,8 @@ int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
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void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
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void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
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void *port_driver_priv, struct net_device *dev);
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void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port,
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void *port_driver_priv);
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void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
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void *port_driver_priv);
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enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
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u16 local_port);
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struct devlink_port *
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mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
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u16 local_port);
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@ -349,8 +345,6 @@ struct mlxsw_driver {
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct netlink_ext_ack *extack);
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void (*fini)(struct mlxsw_core *mlxsw_core);
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int (*port_type_set)(struct mlxsw_core *mlxsw_core, u16 local_port,
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enum devlink_port_type new_type);
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int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port,
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unsigned int count, struct netlink_ext_ack *extack);
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int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port,
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@ -4729,25 +4729,6 @@ MLXSW_ITEM32(reg, ptys, ext_eth_proto_cap, 0x08, 0, 32);
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
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/* reg_ptys_ib_link_width_cap
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* IB port supported widths.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_cap, 0x10, 16, 16);
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#define MLXSW_REG_PTYS_IB_SPEED_SDR BIT(0)
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#define MLXSW_REG_PTYS_IB_SPEED_DDR BIT(1)
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#define MLXSW_REG_PTYS_IB_SPEED_QDR BIT(2)
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#define MLXSW_REG_PTYS_IB_SPEED_FDR10 BIT(3)
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#define MLXSW_REG_PTYS_IB_SPEED_FDR BIT(4)
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#define MLXSW_REG_PTYS_IB_SPEED_EDR BIT(5)
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/* reg_ptys_ib_proto_cap
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* IB port supported speeds and protocols.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_cap, 0x10, 0, 16);
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/* reg_ptys_ext_eth_proto_admin
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* Extended speed and protocol to set port to.
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* Access: RW
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@ -4760,18 +4741,6 @@ MLXSW_ITEM32(reg, ptys, ext_eth_proto_admin, 0x14, 0, 32);
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
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/* reg_ptys_ib_link_width_admin
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* IB width to set port to.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_admin, 0x1C, 16, 16);
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/* reg_ptys_ib_proto_admin
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* IB speeds and protocols to set port to.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_admin, 0x1C, 0, 16);
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/* reg_ptys_ext_eth_proto_oper
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* The extended current speed and protocol configured for the port.
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* Access: RO
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@ -4784,18 +4753,6 @@ MLXSW_ITEM32(reg, ptys, ext_eth_proto_oper, 0x20, 0, 32);
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*/
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MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
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/* reg_ptys_ib_link_width_oper
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* The current IB width to set port to.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_link_width_oper, 0x28, 16, 16);
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/* reg_ptys_ib_proto_oper
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* The current IB speed and protocol.
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ptys, ib_proto_oper, 0x28, 0, 16);
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enum mlxsw_reg_ptys_connector_type {
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MLXSW_REG_PTYS_CONNECTOR_TYPE_UNKNOWN_OR_NO_CONNECTOR,
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MLXSW_REG_PTYS_CONNECTOR_TYPE_PORT_NONE,
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@ -4866,33 +4823,6 @@ static inline void mlxsw_reg_ptys_ext_eth_unpack(char *payload,
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mlxsw_reg_ptys_ext_eth_proto_oper_get(payload);
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}
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static inline void mlxsw_reg_ptys_ib_pack(char *payload, u16 local_port,
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u16 proto_admin, u16 link_width)
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{
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MLXSW_REG_ZERO(ptys, payload);
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mlxsw_reg_ptys_local_port_set(payload, local_port);
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mlxsw_reg_ptys_proto_mask_set(payload, MLXSW_REG_PTYS_PROTO_MASK_IB);
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mlxsw_reg_ptys_ib_proto_admin_set(payload, proto_admin);
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mlxsw_reg_ptys_ib_link_width_admin_set(payload, link_width);
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}
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static inline void mlxsw_reg_ptys_ib_unpack(char *payload, u16 *p_ib_proto_cap,
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u16 *p_ib_link_width_cap,
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u16 *p_ib_proto_oper,
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u16 *p_ib_link_width_oper)
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{
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if (p_ib_proto_cap)
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*p_ib_proto_cap = mlxsw_reg_ptys_ib_proto_cap_get(payload);
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if (p_ib_link_width_cap)
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*p_ib_link_width_cap =
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mlxsw_reg_ptys_ib_link_width_cap_get(payload);
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if (p_ib_proto_oper)
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*p_ib_proto_oper = mlxsw_reg_ptys_ib_proto_oper_get(payload);
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if (p_ib_link_width_oper)
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*p_ib_link_width_oper =
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mlxsw_reg_ptys_ib_link_width_oper_get(payload);
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}
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/* PPAD - Port Physical Address Register
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* -------------------------------------
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* The PPAD register configures the per port physical MAC address.
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@ -5666,27 +5596,6 @@ static inline void mlxsw_reg_ppcnt_pack(char *payload, u16 local_port,
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mlxsw_reg_ppcnt_prio_tc_set(payload, prio_tc);
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}
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/* PLIB - Port Local to InfiniBand Port
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* ------------------------------------
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* The PLIB register performs mapping from Local Port into InfiniBand Port.
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*/
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#define MLXSW_REG_PLIB_ID 0x500A
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#define MLXSW_REG_PLIB_LEN 0x10
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MLXSW_REG_DEFINE(plib, MLXSW_REG_PLIB_ID, MLXSW_REG_PLIB_LEN);
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/* reg_plib_local_port
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* Local port number.
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* Access: Index
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*/
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MLXSW_ITEM32_LP(reg, plib, 0x00, 16, 0x00, 12);
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/* reg_plib_ib_port
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* InfiniBand port remapping for local_port.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, plib, ib_port, 0x00, 0, 8);
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/* PPTB - Port Prio To Buffer Register
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* -----------------------------------
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* Configures the switch priority to buffer table.
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@ -12962,7 +12871,6 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(paos),
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MLXSW_REG(pfcc),
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MLXSW_REG(ppcnt),
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MLXSW_REG(plib),
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MLXSW_REG(pptb),
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MLXSW_REG(pbmc),
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MLXSW_REG(pspa),
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