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drm/i915/fb: Fix rounding error in subsampled plane size calculation

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[ Upstream commit 90ab96f3872eae816f4e07deaa77322a91237960 ]

For NV12 FBs with odd main surface tile-row height the CCS surface
height was incorrectly calculated 1 less than the actual value. Fix this
by rounding up the result of divison. For consistency do the same for
the CCS surface width calculation.

Fixes: b3e57bccd68a ("drm/i915/tgl: Gen-12 render decompression")
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211026225105.2783797-2-imre.deak@intel.com
(cherry picked from commit 2ee5ef9c934ad26376c9282171e731e6c0339815)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Imre Deak 2021-10-27 01:50:59 +03:00 committed by Greg Kroah-Hartman
parent fea0b9507b
commit 2cf82ea0a4
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/i915/display/intel_fb.c
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@ -172,8 +172,9 @@ static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_pl
intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
*w = fb->base.width / main_hsub / hsub;
*h = fb->base.height / main_vsub / vsub;
*w = DIV_ROUND_UP(fb->base.width, main_hsub * hsub);
*h = DIV_ROUND_UP(fb->base.height, main_vsub * vsub);
}
static u32 intel_adjust_tile_offset(int *x, int *y,