powerpc/64s/exception: move and tidy EXCEPTION_PROLOG_2 variants
- Re-name the macros to _REAL and _VIRT suffixes rather than no and _RELON suffix. - Move the macro definitions together in the file. - Move RELOCATABLE ifdef inside the _VIRT macro. Further consolidation between variants does not buy much here. No generated code change. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin
committed by
Michael Ellerman
Michael Ellerman
parent
bd7b6d1334
commit
2d046308d0
@ -174,8 +174,33 @@
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ori reg,reg,(ABS_ADDR(label))@l; \
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addis reg,reg,(ABS_ADDR(label))@h
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.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
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ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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.if ! \set_ri
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xori r10,r10,MSR_RI /* Clear MSR_RI */
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.endif
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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.endif
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LOAD_HANDLER(r12, \label\())
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.if \hsrr
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mtspr SPRN_HSRR0,r12
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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mtspr SPRN_HSRR1,r10
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HRFI_TO_KERNEL
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.else
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mtspr SPRN_SRR0,r12
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mfspr r12,SPRN_SRR1 /* and SRR1 */
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mtspr SPRN_SRR1,r10
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RFI_TO_KERNEL
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.endif
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b . /* prevent speculative execution */
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.endm
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.macro EXCEPTION_PROLOG_2_VIRT label, hsrr
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#ifdef CONFIG_RELOCATABLE
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.macro EXCEPTION_PROLOG_2_RELON label, hsrr
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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@ -191,10 +216,7 @@
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li r10,MSR_RI
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mtmsrd r10,1 /* Set RI (EE=0) */
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bctr
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.endm
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#else
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/* If not relocatable, we can jump directly -- and save messing with LR */
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.macro EXCEPTION_PROLOG_2_RELON label, hsrr
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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@ -205,19 +227,19 @@
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li r10,MSR_RI
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mtmsrd r10,1 /* Set RI (EE=0) */
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b \label
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.endm
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#endif
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.endm
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/*
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* As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
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* rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_RELON will be using LR.
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* rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case
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* EXCEPTION_PROLOG_2_VIRT will be using CTR.
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*/
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#define EXCEPTION_RELON_PROLOG(area, label, hsrr, extra, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2_RELON label, hsrr
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EXCEPTION_PROLOG_2_VIRT label, hsrr
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/* Exception register prefixes */
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#define EXC_HV 1
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@ -323,36 +345,11 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define EXCEPTION_PROLOG_1(area, extra, vec) \
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_EXCEPTION_PROLOG_1(area, extra, vec)
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.macro EXCEPTION_PROLOG_2 label, hsrr, set_ri
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ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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.if ! \set_ri
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xori r10,r10,MSR_RI /* Clear MSR_RI */
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.endif
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.if \hsrr
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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.else
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mfspr r11,SPRN_SRR0 /* save SRR0 */
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.endif
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LOAD_HANDLER(r12,\label\())
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.if \hsrr
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mtspr SPRN_HSRR0,r12
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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mtspr SPRN_HSRR1,r10
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HRFI_TO_KERNEL
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.else
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mtspr SPRN_SRR0,r12
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mfspr r12,SPRN_SRR1 /* and SRR1 */
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mtspr SPRN_SRR1,r10
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RFI_TO_KERNEL
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.endif
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b . /* prevent speculative execution */
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.endm
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#define EXCEPTION_PROLOG(area, label, h, extra, vec) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2 label, h, 1
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EXCEPTION_PROLOG_2_REAL label, h, 1
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/*
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@ -421,7 +418,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec) \
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EXCEPTION_PROLOG_0(area); \
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EXCEPTION_PROLOG_1(area, extra, vec); \
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EXCEPTION_PROLOG_2 label, h, 0
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EXCEPTION_PROLOG_2_REAL label, h, 0
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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.macro KVMTEST hsrr, n
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@ -578,14 +575,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define STD_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
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EXCEPTION_PROLOG_2 label, EXC_STD, 1
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define STD_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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#define STD_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_2 label, EXC_HV, 1
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define STD_RELON_EXCEPTION(loc, vec, label) \
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/* No guest interrupts come through here */ \
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@ -593,14 +590,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define STD_RELON_EXCEPTION_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
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EXCEPTION_PROLOG_2_RELON label, EXC_STD
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EXCEPTION_PROLOG_2_VIRT label, EXC_STD
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#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
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EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)
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#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
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EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
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EXCEPTION_PROLOG_2_RELON label, EXC_HV
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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.macro SOFTEN_TEST hsrr, vec, bitmask
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lbz r10, PACAIRQSOFTMASK(r13)
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@ -649,41 +646,41 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
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EXCEPTION_PROLOG_2 label, h, 1
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EXCEPTION_PROLOG_2_REAL label, h, 1
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#define MASKABLE_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)
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#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
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EXCEPTION_PROLOG_2 label, EXC_STD, 1
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
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#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
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EXCEPTION_PROLOG_2 label, EXC_HV, 1
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EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1
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#define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask) \
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SET_SCRATCH0(r13); /* save r13 */ \
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EXCEPTION_PROLOG_0(PACA_EXGEN); \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
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EXCEPTION_PROLOG_2_RELON label, h
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EXCEPTION_PROLOG_2_VIRT label, h
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#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)
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#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
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EXCEPTION_PROLOG_2 label, EXC_STD, 1
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EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1
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#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask) \
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__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)
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#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
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EXCEPTION_PROLOG_2_RELON label, EXC_HV
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EXCEPTION_PROLOG_2_VIRT label, EXC_HV
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/*
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* Our exception common code can be passed various "additions"
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