cxgb4: Added support in debugfs to display TP logic analyzer output
Dump Transport Processor event trace. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Hariprasad Shenai
David S. Miller
parent
70a5f3bb5f
commit
2d277b3b44
@ -221,6 +221,7 @@ struct sge_params {
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struct tp_params {
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unsigned int ntxchan; /* # of Tx channels */
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unsigned int tre; /* log2 of core clocks per TP tick */
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unsigned int la_mask; /* what events are recorded by TP LA */
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unsigned short tx_modq_map; /* TX modulation scheduler queue to */
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/* channel map */
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@ -1174,6 +1175,7 @@ void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
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void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
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void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
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unsigned int mask, unsigned int val);
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void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
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void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
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struct tp_tcp_stats *v6);
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void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
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@ -315,6 +315,253 @@ static const struct file_operations cim_obq_fops = {
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.release = seq_release_private
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};
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struct field_desc {
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const char *name;
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unsigned int start;
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unsigned int width;
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};
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static void field_desc_show(struct seq_file *seq, u64 v,
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const struct field_desc *p)
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{
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char buf[32];
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int line_size = 0;
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while (p->name) {
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u64 mask = (1ULL << p->width) - 1;
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int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
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((unsigned long long)v >> p->start) & mask);
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if (line_size + len >= 79) {
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line_size = 8;
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seq_puts(seq, "\n ");
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}
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seq_printf(seq, "%s ", buf);
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line_size += len + 1;
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p++;
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}
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seq_putc(seq, '\n');
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}
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static struct field_desc tp_la0[] = {
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{ "RcfOpCodeOut", 60, 4 },
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{ "State", 56, 4 },
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{ "WcfState", 52, 4 },
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{ "RcfOpcSrcOut", 50, 2 },
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{ "CRxError", 49, 1 },
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{ "ERxError", 48, 1 },
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{ "SanityFailed", 47, 1 },
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{ "SpuriousMsg", 46, 1 },
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{ "FlushInputMsg", 45, 1 },
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{ "FlushInputCpl", 44, 1 },
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{ "RssUpBit", 43, 1 },
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{ "RssFilterHit", 42, 1 },
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{ "Tid", 32, 10 },
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{ "InitTcb", 31, 1 },
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{ "LineNumber", 24, 7 },
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{ "Emsg", 23, 1 },
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{ "EdataOut", 22, 1 },
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{ "Cmsg", 21, 1 },
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{ "CdataOut", 20, 1 },
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{ "EreadPdu", 19, 1 },
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{ "CreadPdu", 18, 1 },
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{ "TunnelPkt", 17, 1 },
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{ "RcfPeerFin", 16, 1 },
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{ "RcfReasonOut", 12, 4 },
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{ "TxCchannel", 10, 2 },
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{ "RcfTxChannel", 8, 2 },
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{ "RxEchannel", 6, 2 },
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{ "RcfRxChannel", 5, 1 },
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{ "RcfDataOutSrdy", 4, 1 },
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{ "RxDvld", 3, 1 },
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{ "RxOoDvld", 2, 1 },
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{ "RxCongestion", 1, 1 },
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{ "TxCongestion", 0, 1 },
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{ NULL }
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};
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static int tp_la_show(struct seq_file *seq, void *v, int idx)
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{
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const u64 *p = v;
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field_desc_show(seq, *p, tp_la0);
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return 0;
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}
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static int tp_la_show2(struct seq_file *seq, void *v, int idx)
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{
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const u64 *p = v;
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if (idx)
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seq_putc(seq, '\n');
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field_desc_show(seq, p[0], tp_la0);
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if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
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field_desc_show(seq, p[1], tp_la0);
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return 0;
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}
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static int tp_la_show3(struct seq_file *seq, void *v, int idx)
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{
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static struct field_desc tp_la1[] = {
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{ "CplCmdIn", 56, 8 },
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{ "CplCmdOut", 48, 8 },
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{ "ESynOut", 47, 1 },
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{ "EAckOut", 46, 1 },
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{ "EFinOut", 45, 1 },
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{ "ERstOut", 44, 1 },
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{ "SynIn", 43, 1 },
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{ "AckIn", 42, 1 },
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{ "FinIn", 41, 1 },
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{ "RstIn", 40, 1 },
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{ "DataIn", 39, 1 },
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{ "DataInVld", 38, 1 },
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{ "PadIn", 37, 1 },
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{ "RxBufEmpty", 36, 1 },
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{ "RxDdp", 35, 1 },
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{ "RxFbCongestion", 34, 1 },
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{ "TxFbCongestion", 33, 1 },
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{ "TxPktSumSrdy", 32, 1 },
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{ "RcfUlpType", 28, 4 },
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{ "Eread", 27, 1 },
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{ "Ebypass", 26, 1 },
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{ "Esave", 25, 1 },
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{ "Static0", 24, 1 },
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{ "Cread", 23, 1 },
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{ "Cbypass", 22, 1 },
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{ "Csave", 21, 1 },
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{ "CPktOut", 20, 1 },
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{ "RxPagePoolFull", 18, 2 },
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{ "RxLpbkPkt", 17, 1 },
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{ "TxLpbkPkt", 16, 1 },
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{ "RxVfValid", 15, 1 },
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{ "SynLearned", 14, 1 },
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{ "SetDelEntry", 13, 1 },
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{ "SetInvEntry", 12, 1 },
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{ "CpcmdDvld", 11, 1 },
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{ "CpcmdSave", 10, 1 },
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{ "RxPstructsFull", 8, 2 },
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{ "EpcmdDvld", 7, 1 },
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{ "EpcmdFlush", 6, 1 },
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{ "EpcmdTrimPrefix", 5, 1 },
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{ "EpcmdTrimPostfix", 4, 1 },
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{ "ERssIp4Pkt", 3, 1 },
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{ "ERssIp6Pkt", 2, 1 },
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{ "ERssTcpUdpPkt", 1, 1 },
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{ "ERssFceFipPkt", 0, 1 },
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{ NULL }
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};
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static struct field_desc tp_la2[] = {
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{ "CplCmdIn", 56, 8 },
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{ "MpsVfVld", 55, 1 },
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{ "MpsPf", 52, 3 },
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{ "MpsVf", 44, 8 },
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{ "SynIn", 43, 1 },
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{ "AckIn", 42, 1 },
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{ "FinIn", 41, 1 },
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{ "RstIn", 40, 1 },
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{ "DataIn", 39, 1 },
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{ "DataInVld", 38, 1 },
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{ "PadIn", 37, 1 },
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{ "RxBufEmpty", 36, 1 },
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{ "RxDdp", 35, 1 },
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{ "RxFbCongestion", 34, 1 },
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{ "TxFbCongestion", 33, 1 },
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{ "TxPktSumSrdy", 32, 1 },
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{ "RcfUlpType", 28, 4 },
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{ "Eread", 27, 1 },
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{ "Ebypass", 26, 1 },
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{ "Esave", 25, 1 },
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{ "Static0", 24, 1 },
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{ "Cread", 23, 1 },
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{ "Cbypass", 22, 1 },
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{ "Csave", 21, 1 },
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{ "CPktOut", 20, 1 },
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{ "RxPagePoolFull", 18, 2 },
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{ "RxLpbkPkt", 17, 1 },
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{ "TxLpbkPkt", 16, 1 },
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{ "RxVfValid", 15, 1 },
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{ "SynLearned", 14, 1 },
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{ "SetDelEntry", 13, 1 },
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{ "SetInvEntry", 12, 1 },
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{ "CpcmdDvld", 11, 1 },
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{ "CpcmdSave", 10, 1 },
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{ "RxPstructsFull", 8, 2 },
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{ "EpcmdDvld", 7, 1 },
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{ "EpcmdFlush", 6, 1 },
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{ "EpcmdTrimPrefix", 5, 1 },
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{ "EpcmdTrimPostfix", 4, 1 },
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{ "ERssIp4Pkt", 3, 1 },
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{ "ERssIp6Pkt", 2, 1 },
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{ "ERssTcpUdpPkt", 1, 1 },
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{ "ERssFceFipPkt", 0, 1 },
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{ NULL }
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};
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const u64 *p = v;
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if (idx)
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seq_putc(seq, '\n');
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field_desc_show(seq, p[0], tp_la0);
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if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
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field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
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return 0;
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}
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static int tp_la_open(struct inode *inode, struct file *file)
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{
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struct seq_tab *p;
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struct adapter *adap = inode->i_private;
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switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
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case 2:
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p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
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tp_la_show2);
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break;
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case 3:
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p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
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tp_la_show3);
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break;
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default:
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p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
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}
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if (!p)
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return -ENOMEM;
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t4_tp_read_la(adap, (u64 *)p->data, NULL);
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return 0;
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}
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static ssize_t tp_la_write(struct file *file, const char __user *buf,
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size_t count, loff_t *pos)
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{
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int err;
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char s[32];
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unsigned long val;
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size_t size = min(sizeof(s) - 1, count);
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struct adapter *adap = FILE_DATA(file)->i_private;
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if (copy_from_user(s, buf, size))
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return -EFAULT;
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s[size] = '\0';
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err = kstrtoul(s, 0, &val);
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if (err)
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return err;
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if (val > 0xffff)
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return -EINVAL;
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adap->params.tp.la_mask = val << 16;
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t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
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adap->params.tp.la_mask);
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return count;
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}
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static const struct file_operations tp_la_fops = {
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.owner = THIS_MODULE,
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.open = tp_la_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release_private,
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.write = tp_la_write
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};
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/* Show the PM memory stats. These stats include:
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*
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* TX:
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@ -1619,6 +1866,7 @@ int t4_setup_debugfs(struct adapter *adap)
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{ "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
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{ "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
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{ "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
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{ "tp_la", &tp_la_fops, S_IRUSR, 0 },
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{ "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
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{ "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
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#if IS_ENABLED(CONFIG_IPV6)
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@ -4782,3 +4782,50 @@ restart:
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}
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return ret;
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}
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/**
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* t4_tp_read_la - read TP LA capture buffer
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* @adap: the adapter
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* @la_buf: where to store the LA data
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* @wrptr: the HW write pointer within the capture buffer
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*
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* Reads the contents of the TP LA buffer with the most recent entry at
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* the end of the returned data and with the entry at @wrptr first.
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* We leave the LA in the running state we find it in.
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*/
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void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr)
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{
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bool last_incomplete;
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unsigned int i, cfg, val, idx;
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cfg = t4_read_reg(adap, TP_DBG_LA_CONFIG_A) & 0xffff;
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if (cfg & DBGLAENABLE_F) /* freeze LA */
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t4_write_reg(adap, TP_DBG_LA_CONFIG_A,
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adap->params.tp.la_mask | (cfg ^ DBGLAENABLE_F));
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val = t4_read_reg(adap, TP_DBG_LA_CONFIG_A);
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idx = DBGLAWPTR_G(val);
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last_incomplete = DBGLAMODE_G(val) >= 2 && (val & DBGLAWHLF_F) == 0;
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if (last_incomplete)
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idx = (idx + 1) & DBGLARPTR_M;
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if (wrptr)
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*wrptr = idx;
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val &= 0xffff;
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val &= ~DBGLARPTR_V(DBGLARPTR_M);
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val |= adap->params.tp.la_mask;
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for (i = 0; i < TPLA_SIZE; i++) {
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t4_write_reg(adap, TP_DBG_LA_CONFIG_A, DBGLARPTR_V(idx) | val);
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la_buf[i] = t4_read_reg64(adap, TP_DBG_LA_DATAL_A);
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idx = (idx + 1) & DBGLARPTR_M;
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}
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/* Wipe out last entry if it isn't valid */
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if (last_incomplete)
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la_buf[TPLA_SIZE - 1] = ~0ULL;
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if (cfg & DBGLAENABLE_F) /* restore running state */
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t4_write_reg(adap, TP_DBG_LA_CONFIG_A,
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cfg | adap->params.tp.la_mask);
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}
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@ -63,6 +63,7 @@ enum {
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CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */
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CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */
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CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */
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TPLA_SIZE = 128, /* # of 64-bit words in TP LA */
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};
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enum {
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@ -1183,9 +1183,31 @@
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#define RSVDSPACEINT_F RSVDSPACEINT_V(1U)
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/* registers for module TP */
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#define DBGLAWHLF_S 23
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#define DBGLAWHLF_V(x) ((x) << DBGLAWHLF_S)
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#define DBGLAWHLF_F DBGLAWHLF_V(1U)
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#define DBGLAWPTR_S 16
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#define DBGLAWPTR_M 0x7fU
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#define DBGLAWPTR_G(x) (((x) >> DBGLAWPTR_S) & DBGLAWPTR_M)
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#define DBGLAENABLE_S 12
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#define DBGLAENABLE_V(x) ((x) << DBGLAENABLE_S)
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#define DBGLAENABLE_F DBGLAENABLE_V(1U)
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#define DBGLARPTR_S 0
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#define DBGLARPTR_M 0x7fU
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#define DBGLARPTR_V(x) ((x) << DBGLARPTR_S)
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#define TP_DBG_LA_DATAL_A 0x7ed8
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#define TP_DBG_LA_CONFIG_A 0x7ed4
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#define TP_OUT_CONFIG_A 0x7d04
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#define TP_GLOBAL_CONFIG_A 0x7d08
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#define DBGLAMODE_S 14
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#define DBGLAMODE_M 0x3U
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#define DBGLAMODE_G(x) (((x) >> DBGLAMODE_S) & DBGLAMODE_M)
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#define FIVETUPLELOOKUP_S 17
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#define FIVETUPLELOOKUP_M 0x3U
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#define FIVETUPLELOOKUP_V(x) ((x) << FIVETUPLELOOKUP_S)
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