RISC-V: KVM: No need to use mask when hart-index-bit is 0
When the maximum hart number within groups is 1, hart-index-bit is set to
0. Consequently, there is no need to restore the hart ID from IMSIC
addresses and hart-index-bit settings. Currently, QEMU and kvmtool do not
pass correct hart-index-bit values when the maximum hart number is a
power of 2, thereby avoiding this issue. Corresponding patches for QEMU
and kvmtool will also be dispatched.
Fixes: 89d01306e3
("RISC-V: KVM: Implement device interface for AIA irqchip")
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20240415064905.25184-1-yongxuan.wang@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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Anup Patel
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@ -237,8 +237,9 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa_t addr)
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static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr)
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static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr)
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{
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{
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u32 hart, group = 0;
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u32 hart = 0, group = 0;
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if (aia->nr_hart_bits)
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hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
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hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
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GENMASK_ULL(aia->nr_hart_bits - 1, 0);
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GENMASK_ULL(aia->nr_hart_bits - 1, 0);
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if (aia->nr_group_bits)
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if (aia->nr_group_bits)
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