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Immutable branch for mach-at91 and power-supply for v4.20

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Immutable branch between mach-at91 and power-supply for driver
 changes in at91-poweroff.
 
 Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Merge tag 'psy-at91-poweroff-immutable-for-v4.20-signed' into psy-next

Immutable branch for mach-at91 and power-supply for v4.20

Immutable branch between mach-at91 and power-supply for driver
changes in at91-poweroff.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This commit is contained in:
Sebastian Reichel 2018-09-16 12:37:11 +02:00
commit 2e04dd441a
2 changed files with 90 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/mach-at91/pm_suspend.S
View File

@ -149,6 +149,14 @@ exit_suspend:
ENDPROC(at91_pm_suspend_in_sram)
ENTRY(at91_backup_mode)
/* Switch the master clock source to slow clock. */
ldr pmc, .pmc_base
ldr tmp1, [pmc, #AT91_PMC_MCKR]
bic tmp1, tmp1, #AT91_PMC_CSS
str tmp1, [pmc, #AT91_PMC_MCKR]
wait_mckrdy
/*BUMEN*/
ldr r0, .sfr
mov tmp1, #0x1

123
drivers/power/reset/at91-sama5d2_shdwc.c
View File

@ -19,6 +19,7 @@
*/
#include <linux/clk.h>
#include <linux/clk/at91_pmc.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
@ -69,7 +70,10 @@ struct shdwc_config {
struct shdwc {
const struct shdwc_config *cfg;
void __iomem *at91_shdwc_base;
struct clk *sclk;
void __iomem *shdwc_base;
void __iomem *mpddrc_base;
void __iomem *pmc_base;
};
/*
@ -77,8 +81,6 @@ struct shdwc {
* since pm_power_off itself is global.
*/
static struct shdwc *at91_shdwc;
static struct clk *sclk;
static void __iomem *mpddrc_base;
static const unsigned long long sdwc_dbc_period[] = {
0, 3, 32, 512, 4096, 32768,
@ -90,7 +92,7 @@ static void __init at91_wakeup_status(struct platform_device *pdev)
u32 reg;
char *reason = "unknown";
reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
reg = readl(shdw->shdwc_base + AT91_SHDW_SR);
dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
@ -107,12 +109,6 @@ static void __init at91_wakeup_status(struct platform_device *pdev)
}
static void at91_poweroff(void)
{
writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
}
static void at91_lpddr_poweroff(void)
{
asm volatile(
/* Align to cache lines */
@ -122,16 +118,29 @@ static void at91_lpddr_poweroff(void)
" ldr r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
/* Power down SDRAM0 */
" tst %0, #0\n\t"
" beq 1f\n\t"
" str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
/* Switch the master clock source to slow clock. */
"1: ldr r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
" bic r6, r6, #" __stringify(AT91_PMC_CSS) "\n\t"
" str r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
/* Wait for clock switch. */
"2: ldr r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
" tst r6, #" __stringify(AT91_PMC_MCKRDY) "\n\t"
" beq 2b\n\t"
/* Shutdown CPU */
" str %3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
" b .\n\t"
:
: "r" (mpddrc_base),
: "r" (at91_shdwc->mpddrc_base),
"r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
"r" (at91_shdwc->at91_shdwc_base),
"r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW)
"r" (at91_shdwc->shdwc_base),
"r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
"r" (at91_shdwc->pmc_base)
: "r6");
}
@ -213,10 +222,10 @@ static void at91_shdwc_dt_configure(struct platform_device *pdev)
mode |= SHDW_RTCWKEN(shdw->cfg);
dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
input = at91_shdwc_get_wakeup_input(pdev, np);
writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
}
static const struct shdwc_config sama5d2_shdwc_config = {
@ -246,6 +255,9 @@ static int __init at91_shdwc_probe(struct platform_device *pdev)
if (!pdev->dev.of_node)
return -ENODEV;
if (at91_shdwc)
return -EBUSY;
at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
if (!at91_shdwc)
return -ENOMEM;
@ -253,20 +265,20 @@ static int __init at91_shdwc_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, at91_shdwc);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
at91_shdwc->shdwc_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(at91_shdwc->shdwc_base)) {
dev_err(&pdev->dev, "Could not map reset controller address\n");
return PTR_ERR(at91_shdwc->at91_shdwc_base);
return PTR_ERR(at91_shdwc->shdwc_base);
}
match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
at91_shdwc->cfg = match->data;
sclk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(sclk))
return PTR_ERR(sclk);
at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(at91_shdwc->sclk))
return PTR_ERR(at91_shdwc->sclk);
ret = clk_prepare_enable(sclk);
ret = clk_prepare_enable(at91_shdwc->sclk);
if (ret) {
dev_err(&pdev->dev, "Could not enable slow clock\n");
return ret;
@ -276,41 +288,70 @@ static int __init at91_shdwc_probe(struct platform_device *pdev)
at91_shdwc_dt_configure(pdev);
pm_power_off = at91_poweroff;
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-pmc");
if (!np) {
ret = -ENODEV;
goto clk_disable;
}
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
if (!np)
return 0;
mpddrc_base = of_iomap(np, 0);
at91_shdwc->pmc_base = of_iomap(np, 0);
of_node_put(np);
if (!mpddrc_base)
return 0;
if (!at91_shdwc->pmc_base) {
ret = -ENOMEM;
goto clk_disable;
}
ddr_type = readl(mpddrc_base + AT91_DDRSDRC_MDR) & AT91_DDRSDRC_MD;
if ((ddr_type == AT91_DDRSDRC_MD_LPDDR2) ||
(ddr_type == AT91_DDRSDRC_MD_LPDDR3))
pm_power_off = at91_lpddr_poweroff;
else
iounmap(mpddrc_base);
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
if (!np) {
ret = -ENODEV;
goto unmap;
}
at91_shdwc->mpddrc_base = of_iomap(np, 0);
of_node_put(np);
if (!at91_shdwc->mpddrc_base) {
ret = -ENOMEM;
goto unmap;
}
pm_power_off = at91_poweroff;
ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
AT91_DDRSDRC_MD;
if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
iounmap(at91_shdwc->mpddrc_base);
at91_shdwc->mpddrc_base = NULL;
}
return 0;
unmap:
iounmap(at91_shdwc->pmc_base);
clk_disable:
clk_disable_unprepare(at91_shdwc->sclk);
return ret;
}
static int __exit at91_shdwc_remove(struct platform_device *pdev)
{
struct shdwc *shdw = platform_get_drvdata(pdev);
if (pm_power_off == at91_poweroff ||
pm_power_off == at91_lpddr_poweroff)
if (pm_power_off == at91_poweroff)
pm_power_off = NULL;
/* Reset values to disable wake-up features */
writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
writel(0, shdw->shdwc_base + AT91_SHDW_MR);
writel(0, shdw->shdwc_base + AT91_SHDW_WUIR);
clk_disable_unprepare(sclk);
if (shdw->mpddrc_base)
iounmap(shdw->mpddrc_base);
iounmap(shdw->pmc_base);
clk_disable_unprepare(shdw->sclk);
return 0;
}