drm/amdgpu:enable MCBP for SR-IOV (v2)
Apply the new IB during IB emit for SRIOV with MCBP v2: agd: use define instead of magic number Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -6564,6 +6564,9 @@ static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
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control |= ib->length_dw | (vm_id << 24);
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if (amdgpu_sriov_vf(ring->adev) && ib->flags & AMDGPU_IB_FLAG_PREEMPT)
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control |= INDIRECT_BUFFER_PRE_ENB(1);
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amdgpu_ring_write(ring, header);
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amdgpu_ring_write(ring,
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#ifdef __BIG_ENDIAN
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@ -195,6 +195,7 @@
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* 1 - Stream
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* 2 - Bypass
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*/
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#define INDIRECT_BUFFER_PRE_ENB(x) ((x) << 21)
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#define PACKET3_COPY_DATA 0x40
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#define PACKET3_PFP_SYNC_ME 0x42
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#define PACKET3_SURFACE_SYNC 0x43
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