RDMA/mlx5: Ensure created mkeys always have a populated rb_key
cachable and mmkey.rb_key together are used by mlx5_revoke_mr() to put the MR/mkey back into the cache. In all cases they should be set correctly. alloc_cacheable_mr() was setting cachable but not filling rb_key, resulting in cache_ent_find_and_store() bucketing them all into a 0 length entry. implicit_get_child_mr()/mlx5_ib_alloc_implicit_mr() failed to set cachable or rb_key at all, so the cache was not working at all for implicit ODP. Cc: stable@vger.kernel.org Fixes:8c1185fef6
("RDMA/mlx5: Change check for cacheable mkeys") Fixes:dd1b913fb0
("RDMA/mlx5: Cache all user cacheable mkeys on dereg MR flow") Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/7778c02dfa0999a30d6746c79a23dd7140a9c729.1716900410.git.leon@kernel.org Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -718,6 +718,8 @@ static struct mlx5_ib_mr *_mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
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}
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mr->mmkey.cache_ent = ent;
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mr->mmkey.type = MLX5_MKEY_MR;
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mr->mmkey.rb_key = ent->rb_key;
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mr->mmkey.cacheable = true;
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init_waitqueue_head(&mr->mmkey.wait);
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return mr;
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}
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@ -1168,7 +1170,6 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd,
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mr->ibmr.pd = pd;
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mr->umem = umem;
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mr->page_shift = order_base_2(page_size);
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mr->mmkey.cacheable = true;
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set_mr_fields(dev, mr, umem->length, access_flags, iova);
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return mr;
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