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drm/amd/pm: correct the dpm features disablement for Navi1x

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For BACO scenario, PMFW will handle the dpm features disablement
and interaction with RLC properly. Driver involvement is unnecessary
and error prone.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2021-05-25 10:47:41 +08:00 committed by Alex Deucher
parent 1e75be2b67
commit 2f0cf91037
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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@ -1387,7 +1387,8 @@ static int smu_disable_dpms(struct smu_context *smu)
* For Sienna_Cichlid, PMFW will handle the features disablement properly
* on BACO in. Driver involvement is unnecessary.
*/
if ((adev->asic_type == CHIP_SIENNA_CICHLID) &&
if (((adev->asic_type == CHIP_SIENNA_CICHLID) ||
((adev->asic_type >= CHIP_NAVI10) && (adev->asic_type <= CHIP_NAVI12))) &&
use_baco)
return smu_disable_all_features_with_exception(smu,
true,