arm64: dts: ti: Add support for TI J722S Evaluation Module
Add basic support for the J722S EVM with UART console and MMC SD as rootfs. Schematics are available at: https://www.ti.com/lit/zip/sprr495 Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20240206100608.127702-4-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Vaishnav Achath
Vignesh Raghavendra
parent
ea55b9335a
commit
2f277dbe1a
@ -85,6 +85,9 @@ k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-boa
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dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
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# Boards with J722s SoC
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dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
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# Boards with J784s4 SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
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251
arch/arm64/boot/dts/ti/k3-j722s-evm.dts
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251
arch/arm64/boot/dts/ti/k3-j722s-evm.dts
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@ -0,0 +1,251 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Device Tree file for the J722S EVM
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* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
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*
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* Schematics: https://www.ti.com/lit/zip/sprr495
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*/
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/dts-v1/;
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#include "k3-j722s.dtsi"
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/ {
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compatible = "ti,j722s-evm", "ti,j722s";
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model = "Texas Instruments J722S EVM";
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aliases {
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serial0 = &wkup_uart0;
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serial2 = &main_uart0;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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};
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chosen {
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stdout-path = &main_uart0;
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};
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memory@80000000 {
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/* 8G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000001 0x80000000>;
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device_type = "memory";
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bootph-pre-ram;
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_tfa_ddr: tfa@9e780000 {
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reg = <0x00 0x9e780000 0x00 0x80000>;
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no-map;
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};
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>;
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no-map;
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};
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wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa0100000 0x00 0xf00000>;
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no-map;
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};
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};
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vsys_5v0: regulator-vsys5v0 {
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/* Output of LM5140 */
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compatible = "regulator-fixed";
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regulator-name = "vsys_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-mmc1 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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gpio = <&exp1 15 GPIO_ACTIVE_HIGH>;
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bootph-all;
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};
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vdd_sd_dv: regulator-TLV71033 {
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vsys_5v0>;
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gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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vsys_io_1v8: regulator-vsys-io-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_io_1v2: regulator-vsys-io-1v2 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&main_pmx0 {
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main_i2c0_pins_default: main-i2c0-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
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J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
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>;
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bootph-all;
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};
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main_uart0_pins_default: main-uart0-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
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J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
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>;
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bootph-all;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
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>;
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bootph-all;
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};
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main_mmc1_pins_default: main-mmc1-default-pins {
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pinctrl-single,pins = <
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J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
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J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
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J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
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J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
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J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
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J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
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J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
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>;
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bootph-all;
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};
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};
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&main_gpio1 {
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status = "okay";
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};
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&main_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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status = "okay";
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bootph-all;
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};
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&mcu_pmx0 {
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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pinctrl-single,pins = <
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J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
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J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
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J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
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J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
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>;
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bootph-all;
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};
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wkup_i2c0_pins_default: wkup-i2c0-default-pins {
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pinctrl-single,pins = <
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J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */
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J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */
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>;
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bootph-all;
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};
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};
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&wkup_uart0 {
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/* WKUP UART0 is used by Device Manager firmware */
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "reserved";
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bootph-all;
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};
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&wkup_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_i2c0_pins_default>;
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clock-frequency = <400000>;
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status = "okay";
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bootph-all;
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};
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&main_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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status = "okay";
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bootph-all;
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exp1: gpio@23 {
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compatible = "ti,tca6424";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL",
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"MCASP1_FET_SEL", "CTRL_PM_I2C_OE#",
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"CSI_VIO_SEL", "USB2.0_MUX_SEL",
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"CSI01_MUX_SEL_2", "CSI23_MUX_SEL_2",
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"LMK1_OE1", "LMK1_OE0",
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"LMK2_OE0", "LMK2_OE1",
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"GPIO_RGMII1_RST#", "GPIO_AUD_RSTn",
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"GPIO_eMMC_RSTn", "GPIO_uSD_PWR_EN",
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"USER_LED2", "MCAN0_STB",
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"PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#",
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"ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN",
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"PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ";
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};
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};
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&sdhci1 {
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/* SD/MMC */
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc1_pins_default>;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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no-1-8-v;
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status = "okay";
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bootph-all;
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};
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