x86/apic: Nuke empty init_apic_ldr() callbacks

apic::init_apic_ldr() is only invoked when the APIC is initialized. So
there is really no point in having:

  - Default empty callbacks all over the place

  - Two implementations of the actual LDR init function where one is
    just unreadable gunk but does exactly the same as the other.

Make the apic::init_apic_ldr() invocation conditional, remove the empty
callbacks and consolidate the two implementation into one.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
This commit is contained in:
Thomas Gleixner 2023-08-08 15:03:58 -07:00 committed by Dave Hansen
parent 4114e1686f
commit 2f6df03f80
12 changed files with 24 additions and 77 deletions

View File

@ -445,8 +445,6 @@ extern void generic_bigsmp_probe(void);
#include <asm/smp.h>
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
extern struct apic apic_noop;
static inline unsigned int read_apic_id(void)

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@ -1578,8 +1578,11 @@ static void setup_local_APIC(void)
/*
* Intel recommends to set DFR, LDR and TPR before enabling
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
* document number 292116). So here it goes...
* document number 292116).
*
* Except for APICs which operate in physical destination mode.
*/
if (apic->init_apic_ldr)
apic->init_apic_ldr();
/*

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@ -6,6 +6,8 @@
#include <linux/irq.h>
#include <asm/apic.h>
#include "local.h"
u32 apic_default_calc_apicid(unsigned int cpu)
{
return per_cpu(x86_cpu_to_apicid, cpu);
@ -39,3 +41,17 @@ int default_apic_id_valid(u32 apicid)
{
return (apicid < 255);
}
/*
* Set up the logical destination ID when the APIC operates in logical
* destination mode.
*/
void default_init_apic_ldr(void)
{
unsigned long val;
apic_write(APIC_DFR, APIC_DFR_FLAT);
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
apic_write(APIC_LDR, val);
}

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@ -28,26 +28,6 @@ static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
return 1;
}
/*
* Set up the logical destination ID.
*
* Intel recommends to set DFR, LDR and TPR before enabling
* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
* document number 292116). So here it goes...
*/
void flat_init_apic_ldr(void)
{
unsigned long val;
unsigned long num, id;
num = smp_processor_id();
id = 1UL << num;
apic_write(APIC_DFR, APIC_DFR_FLAT);
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
val |= SET_APIC_LOGICAL_ID(id);
apic_write(APIC_LDR, val);
}
static void _flat_send_IPI_mask(unsigned long mask, int vector)
{
unsigned long flags;
@ -119,7 +99,7 @@ static struct apic apic_flat __ro_after_init = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = flat_init_apic_ldr,
.init_apic_ldr = default_init_apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,
@ -175,15 +155,6 @@ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
return 0;
}
static void physflat_init_apic_ldr(void)
{
/*
* LDR and DFR are not involved in physflat mode, rather:
* "In physical destination mode, the destination processor is
* specified by its local APIC ID [...]." (Intel SDM, 10.6.2.1)
*/
}
static int physflat_probe(void)
{
if (apic == &apic_physflat || num_possible_cpus() > 8 ||
@ -207,7 +178,6 @@ static struct apic apic_physflat __ro_after_init = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = physflat_init_apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -14,7 +14,6 @@
#include <asm/apic.h>
static void noop_init_apic_ldr(void) { }
static void noop_send_IPI(int cpu, int vector) { }
static void noop_send_IPI_mask(const struct cpumask *cpumask, int vector) { }
static void noop_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector) { }
@ -94,7 +93,6 @@ struct apic apic_noop __ro_after_init = {
.disable_esr = 0,
.check_apicid_used = default_check_apicid_used,
.init_apic_ldr = noop_init_apic_ldr,
.ioapic_phys_id_map = default_ioapic_phys_id_map,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -252,7 +252,6 @@ static const struct apic apic_numachip1 __refconst = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = flat_init_apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,
@ -297,7 +296,6 @@ static const struct apic apic_numachip2 __refconst = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = flat_init_apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -28,14 +28,6 @@ static bool bigsmp_check_apicid_used(physid_mask_t *map, int apicid)
return false;
}
/*
* bigsmp enables physical destination mode
* and doesn't use LDR and DFR
*/
static void bigsmp_init_apic_ldr(void)
{
}
static void bigsmp_setup_apic_routing(void)
{
printk(KERN_INFO
@ -108,7 +100,6 @@ static struct apic apic_bigsmp __ro_after_init = {
.disable_esr = 1,
.check_apicid_used = bigsmp_check_apicid_used,
.init_apic_ldr = bigsmp_init_apic_ldr,
.ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
.setup_apic_routing = bigsmp_setup_apic_routing,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -13,9 +13,6 @@
#include <asm/irq_vectors.h>
#include <asm/apic.h>
/* APIC flat 64 */
void flat_init_apic_ldr(void);
/* X2APIC */
int x2apic_apic_id_valid(u32 apicid);
int x2apic_apic_id_registered(void);
@ -46,6 +43,8 @@ static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
return icr;
}
void default_init_apic_ldr(void);
void __default_send_IPI_shortcut(unsigned int shortcut, int vector);
/*

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@ -32,21 +32,6 @@ static int default_apic_id_registered(void)
return physid_isset(read_apic_id(), phys_cpu_present_map);
}
/*
* Set up the logical destination ID. Intel recommends to set DFR, LDR and
* TPR before enabling an APIC. See e.g. "AP-388 82489DX User's Manual"
* (Intel document number 292116).
*/
static void default_init_apic_ldr(void)
{
unsigned long val;
apic_write(APIC_DFR, APIC_DFR_VALUE);
val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
apic_write(APIC_LDR, val);
}
static int default_phys_pkg_id(int cpuid_apic, int index_msb)
{
return cpuid_apic >> index_msb;

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@ -91,10 +91,6 @@ static void x2apic_send_IPI_all(int vector)
__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
}
static void init_x2apic_ldr(void)
{
}
static int x2apic_phys_probe(void)
{
if (!x2apic_mode)
@ -169,7 +165,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = init_x2apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -788,10 +788,6 @@ static int uv_apic_id_registered(void)
return 1;
}
static void uv_init_apic_ldr(void)
{
}
static u32 apic_uv_calc_apicid(unsigned int cpu)
{
return apic_default_calc_apicid(cpu);
@ -841,7 +837,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
.disable_esr = 0,
.check_apicid_used = NULL,
.init_apic_ldr = uv_init_apic_ldr,
.ioapic_phys_id_map = NULL,
.setup_apic_routing = NULL,
.cpu_present_to_apicid = default_cpu_present_to_apicid,

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@ -149,7 +149,6 @@ static struct apic xen_pv_apic = {
.disable_esr = 0,
.check_apicid_used = default_check_apicid_used, /* Used on 32-bit */
.init_apic_ldr = xen_noop, /* setup_local_APIC calls it */
.ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */
.setup_apic_routing = NULL,
.cpu_present_to_apicid = xen_cpu_present_to_apicid,