mm: introduce ARCH_HAS_PTE_SPECIAL
Currently the PTE special supports is turned on in per architecture header files. Most of the time, it is defined in arch/*/include/asm/pgtable.h depending or not on some other per architecture static definition. This patch introduce a new configuration variable to manage this directly in the Kconfig files. It would later replace __HAVE_ARCH_PTE_SPECIAL. Here notes for some architecture where the definition of __HAVE_ARCH_PTE_SPECIAL is not obvious: arm __HAVE_ARCH_PTE_SPECIAL which is currently defined in arch/arm/include/asm/pgtable-3level.h which is included by arch/arm/include/asm/pgtable.h when CONFIG_ARM_LPAE is set. So select ARCH_HAS_PTE_SPECIAL if ARM_LPAE. powerpc __HAVE_ARCH_PTE_SPECIAL is defined in 2 files: - arch/powerpc/include/asm/book3s/64/pgtable.h - arch/powerpc/include/asm/pte-common.h The first one is included if (PPC_BOOK3S & PPC64) while the second is included in all the other cases. So select ARCH_HAS_PTE_SPECIAL all the time. sparc: __HAVE_ARCH_PTE_SPECIAL is defined if defined(__sparc__) && defined(__arch64__) which are defined through the compiler in sparc/Makefile if !SPARC32 which I assume to be if SPARC64. So select ARCH_HAS_PTE_SPECIAL if SPARC64 There is no functional change introduced by this patch. Link: http://lkml.kernel.org/r/1523433816-14460-2-git-send-email-ldufour@linux.vnet.ibm.com Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com> Suggested-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Acked-by: David Rientjes <rientjes@google.com> Cc: Michal Hocko <mhocko@kernel.org> Cc: "Aneesh Kumar K . V" <aneesh.kumar@linux.vnet.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: David S. Miller <davem@davemloft.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Albert Ou <albert@sifive.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: David Rientjes <rientjes@google.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Christophe LEROY <christophe.leroy@c-s.fr> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -1,6 +1,6 @@
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#
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# Feature name: pte_special
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# Kconfig: __HAVE_ARCH_PTE_SPECIAL
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# Kconfig: ARCH_HAS_PTE_SPECIAL
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# description: arch supports the pte_special()/pte_mkspecial() VM APIs
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#
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-----------------------
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@ -48,6 +48,7 @@ config ARC
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select HAVE_GENERIC_DMA_COHERENT
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select HAVE_KERNEL_GZIP
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select HAVE_KERNEL_LZMA
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select ARCH_HAS_PTE_SPECIAL
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config MIGHT_HAVE_PCI
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bool
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@ -320,8 +320,6 @@ PTE_BIT_FUNC(mkexec, |= (_PAGE_EXECUTE));
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PTE_BIT_FUNC(mkspecial, |= (_PAGE_SPECIAL));
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PTE_BIT_FUNC(mkhuge, |= (_PAGE_HW_SZ));
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#define __HAVE_ARCH_PTE_SPECIAL
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
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@ -8,6 +8,7 @@ config ARM
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_PTE_SPECIAL if ARM_LPAE
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select ARCH_HAS_SET_MEMORY
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
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@ -219,7 +219,6 @@ static inline pte_t pte_mkspecial(pte_t pte)
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pte_val(pte) |= L_PTE_SPECIAL;
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return pte;
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}
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#define __HAVE_ARCH_PTE_SPECIAL
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#define pmd_write(pmd) (pmd_isclear((pmd), L_PMD_SECT_RDONLY))
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#define pmd_dirty(pmd) (pmd_isset((pmd), L_PMD_SECT_DIRTY))
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@ -17,6 +17,7 @@ config ARM64
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select ARCH_HAS_GIGANTIC_PAGE if (MEMORY_ISOLATION && COMPACTION) || CMA
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select ARCH_HAS_KCOV
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select ARCH_HAS_MEMBARRIER_SYNC_CORE
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_SET_MEMORY
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select ARCH_HAS_SG_CHAIN
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select ARCH_HAS_STRICT_KERNEL_RWX
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@ -306,8 +306,6 @@ static inline int pte_same(pte_t pte_a, pte_t pte_b)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#define __HAVE_ARCH_PTE_SPECIAL
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static inline pte_t pgd_pte(pgd_t pgd)
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{
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return __pte(pgd_val(pgd));
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@ -135,6 +135,7 @@ config PPC
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_PMEM_API if PPC64
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_MEMBARRIER_CALLBACKS
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select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE
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select ARCH_HAS_SG_CHAIN
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@ -335,9 +335,6 @@ extern unsigned long pci_io_base;
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/* Advertise special mapping type for AGP */
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#define HAVE_PAGE_AGP
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/* Advertise support for _PAGE_SPECIAL */
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#define __HAVE_ARCH_PTE_SPECIAL
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#ifndef __ASSEMBLY__
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/*
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@ -208,9 +208,6 @@ static inline bool pte_user(pte_t pte)
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#define PAGE_AGP (PAGE_KERNEL_NC)
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#define HAVE_PAGE_AGP
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/* Advertise support for _PAGE_SPECIAL */
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#define __HAVE_ARCH_PTE_SPECIAL
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#ifndef _PAGE_READ
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/* if not defined, we should not find _PAGE_WRITE too */
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#define _PAGE_READ 0
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@ -42,6 +42,7 @@ config RISCV
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select THREAD_INFO_IN_TASK
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select RISCV_TIMER
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select GENERIC_IRQ_MULTI_HANDLER
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select ARCH_HAS_PTE_SPECIAL
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config MMU
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def_bool y
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@ -42,7 +42,4 @@
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_PAGE_WRITE | _PAGE_EXEC | \
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_PAGE_USER | _PAGE_GLOBAL))
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/* Advertise support for _PAGE_SPECIAL */
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#define __HAVE_ARCH_PTE_SPECIAL
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#endif /* _ASM_RISCV_PGTABLE_BITS_H */
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@ -65,6 +65,7 @@ config S390
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_GIGANTIC_PAGE if (MEMORY_ISOLATION && COMPACTION) || CMA
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select ARCH_HAS_KCOV
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_SET_MEMORY
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select ARCH_HAS_SG_CHAIN
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select ARCH_HAS_STRICT_KERNEL_RWX
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@ -171,7 +171,6 @@ static inline int is_module_addr(void *addr)
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#define _PAGE_WRITE 0x020 /* SW pte write bit */
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#define _PAGE_SPECIAL 0x040 /* SW associated with special page */
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#define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
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#define __HAVE_ARCH_PTE_SPECIAL
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#ifdef CONFIG_MEM_SOFT_DIRTY
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#define _PAGE_SOFT_DIRTY 0x002 /* SW pte soft dirty bit */
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@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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config SUPERH
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def_bool y
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_NO_COHERENT_DMA_MMAP if !MMU
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@ -156,8 +156,6 @@ extern void page_table_range_init(unsigned long start, unsigned long end,
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#define HAVE_ARCH_UNMAPPED_AREA
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#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
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#define __HAVE_ARCH_PTE_SPECIAL
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#include <asm-generic/pgtable.h>
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#endif /* __ASM_SH_PGTABLE_H */
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@ -88,6 +88,7 @@ config SPARC64
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select ARCH_USE_QUEUED_SPINLOCKS
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select GENERIC_TIME_VSYSCALL
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select ARCH_CLOCKSOURCE_DATA
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select ARCH_HAS_PTE_SPECIAL
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config ARCH_DEFCONFIG
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string
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@ -117,9 +117,6 @@ bool kern_addr_valid(unsigned long addr);
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#define _PAGE_PMD_HUGE _AC(0x0100000000000000,UL) /* Huge page */
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#define _PAGE_PUD_HUGE _PAGE_PMD_HUGE
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/* Advertise support for _PAGE_SPECIAL */
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#define __HAVE_ARCH_PTE_SPECIAL
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/* SUN4U pte bits... */
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#define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */
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#define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */
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@ -60,6 +60,7 @@ config X86
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select ARCH_HAS_KCOV if X86_64
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select ARCH_HAS_MEMBARRIER_SYNC_CORE
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select ARCH_HAS_PMEM_API if X86_64
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_REFCOUNT
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select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64
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select ARCH_HAS_UACCESS_MCSAFE if X86_64
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@ -65,7 +65,6 @@
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#define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
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#define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
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#endif
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#define __HAVE_ARCH_PTE_SPECIAL
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#define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
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_PAGE_PKEY_BIT1 | \
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@ -122,7 +122,7 @@ pud_t pud_mkdevmap(pud_t pud);
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#endif
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#endif /* __HAVE_ARCH_PTE_DEVMAP */
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#ifdef __HAVE_ARCH_PTE_SPECIAL
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#ifdef CONFIG_ARCH_HAS_PTE_SPECIAL
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static inline bool pfn_t_special(pfn_t pfn)
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{
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return (pfn.val & PFN_SPECIAL) == PFN_SPECIAL;
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@ -132,5 +132,5 @@ static inline bool pfn_t_special(pfn_t pfn)
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{
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return false;
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}
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#endif /* __HAVE_ARCH_PTE_SPECIAL */
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#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
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#endif /* _LINUX_PFN_T_H_ */
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@ -754,3 +754,6 @@ config GUP_BENCHMARK
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performance of get_user_pages_fast().
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See tools/testing/selftests/vm/gup_benchmark.c
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config ARCH_HAS_PTE_SPECIAL
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bool
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4
mm/gup.c
4
mm/gup.c
@ -1354,7 +1354,7 @@ static void undo_dev_pagemap(int *nr, int nr_start, struct page **pages)
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}
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}
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#ifdef __HAVE_ARCH_PTE_SPECIAL
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#ifdef CONFIG_ARCH_HAS_PTE_SPECIAL
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static int gup_pte_range(pmd_t pmd, unsigned long addr, unsigned long end,
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int write, struct page **pages, int *nr)
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{
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@ -1430,7 +1430,7 @@ static int gup_pte_range(pmd_t pmd, unsigned long addr, unsigned long end,
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{
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return 0;
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}
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#endif /* __HAVE_ARCH_PTE_SPECIAL */
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#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
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#if defined(__HAVE_ARCH_PTE_DEVMAP) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
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static int __gup_device_huge(unsigned long pfn, unsigned long addr,
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* PFNMAP mappings in order to support COWable mappings.
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*
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*/
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#ifdef __HAVE_ARCH_PTE_SPECIAL
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#ifdef CONFIG_ARCH_HAS_PTE_SPECIAL
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# define HAVE_PTE_SPECIAL 1
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#else
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# define HAVE_PTE_SPECIAL 0
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