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net: tn40xx: add phylink support

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This patch adds supports for multiple PHY hardware with phylink. The
adapters with TN40xx chips use multiple PHY hardware; AMCC QT2025, TI
TLK10232, Aqrate AQR105, and Marvell 88X3120, 88X3310, and MV88E2010.

For now, the PCI ID table of this driver enables adapters using only
QT2025 PHY. I've tested this driver and the QT2025 PHY driver (SFP+
10G SR) with Edimax EN-9320 10G adapter.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
Reviewed-by: Hans-Frieder Vogt <hfdevel@gmx.net>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/20240623235507.108147-8-fujita.tomonori@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
FUJITA Tomonori 2024-06-24 08:55:07 +09:00 committed by Jakub Kicinski
parent 7fdbd2f2bb
commit 3082412242
5 changed files with 114 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/tehuti/Kconfig
View File

@ -28,6 +28,7 @@ config TEHUTI_TN40
depends on PCI
select PAGE_POOL
select FW_LOADER
select PHYLINK
help
This driver supports 10G Ethernet adapters using Tehuti Networks
TN40xx chips. Currently, adapters with Applied Micro Circuits

2
drivers/net/ethernet/tehuti/Makefile
View File

@ -5,5 +5,5 @@
obj-$(CONFIG_TEHUTI) += tehuti.o
tn40xx-y := tn40.o tn40_mdio.o
tn40xx-y := tn40.o tn40_mdio.o tn40_phy.o
obj-$(CONFIG_TEHUTI_TN40) += tn40xx.o

31
drivers/net/ethernet/tehuti/tn40.c
View File

@ -8,6 +8,7 @@
#include <linux/iopoll.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/phylink.h>
#include <linux/vmalloc.h>
#include <net/page_pool/helpers.h>
@ -966,7 +967,7 @@ static void tn40_tx_push_desc_safe(struct tn40_priv *priv, void *data, int size)
}
}
static int tn40_set_link_speed(struct tn40_priv *priv, u32 speed)
int tn40_set_link_speed(struct tn40_priv *priv, u32 speed)
{
u32 val;
int i;
@ -1391,6 +1392,9 @@ static int tn40_close(struct net_device *ndev)
{
struct tn40_priv *priv = netdev_priv(ndev);
phylink_stop(priv->phylink);
phylink_disconnect_phy(priv->phylink);
napi_disable(&priv->napi);
netif_napi_del(&priv->napi);
tn40_stop(priv);
@ -1402,13 +1406,20 @@ static int tn40_open(struct net_device *dev)
struct tn40_priv *priv = netdev_priv(dev);
int ret;
ret = phylink_connect_phy(priv->phylink, priv->phydev);
if (ret) {
netdev_err(dev, "failed to connect to phy %d\n", ret);
return ret;
}
tn40_sw_reset(priv);
ret = tn40_start(priv);
if (ret) {
phylink_disconnect_phy(priv->phylink);
netdev_err(dev, "failed to start %d\n", ret);
return ret;
}
napi_enable(&priv->napi);
phylink_start(priv->phylink);
netif_start_queue(priv->ndev);
return 0;
}
@ -1685,6 +1696,12 @@ static int tn40_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
goto err_unset_drvdata;
}
ret = tn40_mdiobus_init(priv);
if (ret) {
dev_err(&pdev->dev, "failed to initialize mdio bus.\n");
goto err_free_irq;
}
priv->stats_flag =
((tn40_read_reg(priv, TN40_FPGA_VER) & 0xFFF) != 308);
u64_stats_init(&priv->syncp);
@ -1694,19 +1711,26 @@ static int tn40_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
TN40_IR_TMR1;
tn40_mac_init(priv);
ret = tn40_phy_register(priv);
if (ret) {
dev_err(&pdev->dev, "failed to set up PHY.\n");
goto err_free_irq;
}
ret = tn40_priv_init(priv);
if (ret) {
dev_err(&pdev->dev, "failed to initialize tn40_priv.\n");
goto err_free_irq;
goto err_unregister_phydev;
}
ret = register_netdev(ndev);
if (ret) {
dev_err(&pdev->dev, "failed to register netdev.\n");
goto err_free_irq;
goto err_unregister_phydev;
}
return 0;
err_unregister_phydev:
tn40_phy_unregister(priv);
err_free_irq:
pci_free_irq_vectors(pdev);
err_unset_drvdata:
@ -1727,6 +1751,7 @@ static void tn40_remove(struct pci_dev *pdev)
unregister_netdev(ndev);
tn40_phy_unregister(priv);
pci_free_irq_vectors(priv->pdev);
pci_set_drvdata(pdev, NULL);
iounmap(priv->regs);

8
drivers/net/ethernet/tehuti/tn40.h
View File

@ -142,6 +142,9 @@ struct tn40_priv {
char *b0_va; /* Virtual address of buffer */
struct mii_bus *mdio;
struct phy_device *phydev;
struct phylink *phylink;
struct phylink_config phylink_config;
};
/* RX FREE descriptor - 64bit */
@ -219,6 +222,11 @@ static inline void tn40_write_reg(struct tn40_priv *priv, u32 reg, u32 val)
writel(val, priv->regs + reg);
}
int tn40_set_link_speed(struct tn40_priv *priv, u32 speed);
int tn40_mdiobus_init(struct tn40_priv *priv);
int tn40_phy_register(struct tn40_priv *priv);
void tn40_phy_unregister(struct tn40_priv *priv);
#endif /* _TN40XX_H */

76
drivers/net/ethernet/tehuti/tn40_phy.c Normal file
View File

@ -0,0 +1,76 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (c) Tehuti Networks Ltd. */
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/phylink.h>
#include "tn40.h"
static struct tn40_priv *tn40_config_to_priv(struct phylink_config *config)
{
return container_of(config, struct tn40_priv, phylink_config);
}
static void tn40_link_up(struct phylink_config *config, struct phy_device *phy,
unsigned int mode, phy_interface_t interface,
int speed, int duplex, bool tx_pause, bool rx_pause)
{
struct tn40_priv *priv = tn40_config_to_priv(config);
tn40_set_link_speed(priv, speed);
netif_wake_queue(priv->ndev);
}
static void tn40_link_down(struct phylink_config *config, unsigned int mode,
phy_interface_t interface)
{
struct tn40_priv *priv = tn40_config_to_priv(config);
netif_stop_queue(priv->ndev);
tn40_set_link_speed(priv, 0);
}
static void tn40_mac_config(struct phylink_config *config, unsigned int mode,
const struct phylink_link_state *state)
{
}
static const struct phylink_mac_ops tn40_mac_ops = {
.mac_config = tn40_mac_config,
.mac_link_up = tn40_link_up,
.mac_link_down = tn40_link_down,
};
int tn40_phy_register(struct tn40_priv *priv)
{
struct phylink_config *config;
struct phy_device *phydev;
struct phylink *phylink;
phydev = phy_find_first(priv->mdio);
if (!phydev) {
dev_err(&priv->pdev->dev, "PHY isn't found\n");
return -ENODEV;
}
config = &priv->phylink_config;
config->dev = &priv->ndev->dev;
config->type = PHYLINK_NETDEV;
config->mac_capabilities = MAC_10000FD;
__set_bit(PHY_INTERFACE_MODE_XAUI, config->supported_interfaces);
phylink = phylink_create(config, NULL, PHY_INTERFACE_MODE_XAUI,
&tn40_mac_ops);
if (IS_ERR(phylink))
return PTR_ERR(phylink);
priv->phydev = phydev;
priv->phylink = phylink;
return 0;
}
void tn40_phy_unregister(struct tn40_priv *priv)
{
phylink_destroy(priv->phylink);
}