i2c: designware: Fix RX FIFO depth define on Wangxun 10Gb NIC
[ Upstream commit c94612a72ac87b0337a0d85b9263266776ed4190 ] I believe RX FIFO depth define 0 is incorrect on Wangxun 10Gb NIC. It must be at least 1 since code is able to read received data from the DW_IC_DATA_CMD register. For now this define is irrelevant since the txgbe_i2c_dw_xfer_quirk() doesn't use the rx_fifo_depth member variable of struct dw_i2c_dev but is needed when converting code into generic polling mode implementation. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jiawen Wu <jiawenwu@trustnetic.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -318,7 +318,7 @@ struct dw_i2c_dev {
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#define AMD_UCSI_INTR_EN 0xd
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#define TXGBE_TX_FIFO_DEPTH 4
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#define TXGBE_RX_FIFO_DEPTH 0
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#define TXGBE_RX_FIFO_DEPTH 1
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struct i2c_dw_semaphore_callbacks {
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int (*probe)(struct dw_i2c_dev *dev);
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