[PATCH] cpm_uart: Fix dpram allocation and non-console uarts
* Makes dpram allocations work * Makes non-console UART work on both 8xx and 82xx * Fixed whitespace in files that were touched Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Pantelis Antoniou <panto@intracom.gr> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Kumar Gala
Linus Torvalds
parent
3077a260e9
commit
311c46273f
@ -40,13 +40,15 @@
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#define TX_NUM_FIFO 4
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#define TX_BUF_SIZE 32
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#define SCC_WAIT_CLOSING 100
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struct uart_cpm_port {
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struct uart_port port;
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u16 rx_nrfifos;
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u16 rx_nrfifos;
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u16 rx_fifosize;
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u16 tx_nrfifos;
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u16 tx_nrfifos;
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u16 tx_fifosize;
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smc_t *smcp;
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smc_t *smcp;
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smc_uart_t *smcup;
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scc_t *sccp;
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scc_uart_t *sccup;
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@ -67,6 +69,8 @@ struct uart_cpm_port {
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int bits;
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/* Keep track of 'odd' SMC2 wirings */
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int is_portb;
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/* wait on close if needed */
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int wait_closing;
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};
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extern int cpm_uart_port_map[UART_NR];
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@ -9,9 +9,10 @@
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*
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* Maintainer: Kumar Gala (kumar.gala@freescale.com) (CPM2)
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* Pantelis Antoniou (panto@intracom.gr) (CPM1)
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*
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*
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* Copyright (C) 2004 Freescale Semiconductor, Inc.
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* (C) 2004 Intracom, S.A.
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* (C) 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -70,8 +71,22 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
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/**************************************************************/
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static inline unsigned long cpu2cpm_addr(void *addr)
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{
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if ((unsigned long)addr >= CPM_ADDR)
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return (unsigned long)addr;
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return virt_to_bus(addr);
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}
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static inline void *cpm2cpu_addr(unsigned long addr)
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{
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if (addr >= CPM_ADDR)
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return (void *)addr;
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return bus_to_virt(addr);
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}
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/*
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* Check, if transmit buffers are processed
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* Check, if transmit buffers are processed
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*/
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static unsigned int cpm_uart_tx_empty(struct uart_port *port)
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{
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@ -143,15 +158,18 @@ static void cpm_uart_start_tx(struct uart_port *port, unsigned int tty_start)
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}
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if (cpm_uart_tx_pump(port) != 0) {
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if (IS_SMC(pinfo))
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if (IS_SMC(pinfo)) {
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smcp->smc_smcm |= SMCM_TX;
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else
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smcp->smc_smcmr |= SMCMR_TEN;
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} else {
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sccp->scc_sccm |= UART_SCCM_TX;
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pinfo->sccp->scc_gsmrl |= SCC_GSMRL_ENT;
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}
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}
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}
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/*
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* Stop receiver
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* Stop receiver
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*/
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static void cpm_uart_stop_rx(struct uart_port *port)
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{
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@ -176,7 +194,7 @@ static void cpm_uart_enable_ms(struct uart_port *port)
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}
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/*
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* Generate a break.
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* Generate a break.
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*/
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static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
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{
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@ -231,7 +249,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
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/* get number of characters, and check spce in flip-buffer */
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i = bdp->cbd_datlen;
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/* If we have not enough room in tty flip buffer, then we try
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/* If we have not enough room in tty flip buffer, then we try
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* later, which will be the next rx-interrupt or a timeout
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*/
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if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) {
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@ -243,7 +261,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
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}
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/* get pointer */
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cp = (unsigned char *)bus_to_virt(bdp->cbd_bufaddr);
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cp = cpm2cpu_addr(bdp->cbd_bufaddr);
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/* loop through the buffer */
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while (i-- > 0) {
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@ -265,13 +283,14 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
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} /* End while (i--) */
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/* This BD is ready to be used again. Clear status. get next */
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bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
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bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
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bdp->cbd_sc |= BD_SC_EMPTY;
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if (bdp->cbd_sc & BD_SC_WRAP)
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bdp = pinfo->rx_bd_base;
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else
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bdp++;
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} /* End for (;;) */
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/* Write back buffer pointer */
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@ -336,22 +355,22 @@ static irqreturn_t cpm_uart_int(int irq, void *data, struct pt_regs *regs)
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if (IS_SMC(pinfo)) {
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events = smcp->smc_smce;
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smcp->smc_smce = events;
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if (events & SMCM_BRKE)
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uart_handle_break(port);
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if (events & SMCM_RX)
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cpm_uart_int_rx(port, regs);
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if (events & SMCM_TX)
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cpm_uart_int_tx(port, regs);
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smcp->smc_smce = events;
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} else {
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events = sccp->scc_scce;
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sccp->scc_scce = events;
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if (events & UART_SCCM_BRKE)
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uart_handle_break(port);
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if (events & UART_SCCM_RX)
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cpm_uart_int_rx(port, regs);
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if (events & UART_SCCM_TX)
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cpm_uart_int_tx(port, regs);
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sccp->scc_scce = events;
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}
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return (events) ? IRQ_HANDLED : IRQ_NONE;
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}
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@ -360,6 +379,7 @@ static int cpm_uart_startup(struct uart_port *port)
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{
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int retval;
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struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
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int line = pinfo - cpm_uart_ports;
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pr_debug("CPM uart[%d]:startup\n", port->line);
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@ -376,9 +396,19 @@ static int cpm_uart_startup(struct uart_port *port)
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pinfo->sccp->scc_sccm |= UART_SCCM_RX;
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}
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if (!(pinfo->flags & FLAG_CONSOLE))
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cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
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return 0;
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}
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inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
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{
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unsigned long target_jiffies = jiffies + pinfo->wait_closing;
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while (!time_after(jiffies, target_jiffies))
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schedule();
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}
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/*
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* Shutdown the uart
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*/
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@ -394,6 +424,12 @@ static void cpm_uart_shutdown(struct uart_port *port)
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/* If the port is not the console, disable Rx and Tx. */
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if (!(pinfo->flags & FLAG_CONSOLE)) {
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/* Wait for all the BDs marked sent */
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while(!cpm_uart_tx_empty(port))
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schedule_timeout(2);
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if(pinfo->wait_closing)
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cpm_uart_wait_until_send(pinfo);
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/* Stop uarts */
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if (IS_SMC(pinfo)) {
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volatile smc_t *smcp = pinfo->smcp;
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@ -502,7 +538,7 @@ static void cpm_uart_set_termios(struct uart_port *port,
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*/
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if ((termios->c_cflag & CREAD) == 0)
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port->read_status_mask &= ~BD_SC_EMPTY;
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spin_lock_irqsave(&port->lock, flags);
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/* Start bit has not been added (so don't, because we would just
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@ -569,7 +605,8 @@ static int cpm_uart_tx_pump(struct uart_port *port)
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/* Pick next descriptor and fill from buffer */
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bdp = pinfo->tx_cur;
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p = bus_to_virt(bdp->cbd_bufaddr);
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p = cpm2cpu_addr(bdp->cbd_bufaddr);
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*p++ = xmit->buf[xmit->tail];
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bdp->cbd_datlen = 1;
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bdp->cbd_sc |= BD_SC_READY;
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@ -595,7 +632,7 @@ static int cpm_uart_tx_pump(struct uart_port *port)
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while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
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count = 0;
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p = bus_to_virt(bdp->cbd_bufaddr);
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p = cpm2cpu_addr(bdp->cbd_bufaddr);
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while (count < pinfo->tx_fifosize) {
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*p++ = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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@ -606,6 +643,7 @@ static int cpm_uart_tx_pump(struct uart_port *port)
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}
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bdp->cbd_datlen = count;
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bdp->cbd_sc |= BD_SC_READY;
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__asm__("eieio");
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/* Get next BD. */
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if (bdp->cbd_sc & BD_SC_WRAP)
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bdp = pinfo->tx_bd_base;
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@ -643,12 +681,12 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
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mem_addr = pinfo->mem_addr;
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bdp = pinfo->rx_cur = pinfo->rx_bd_base;
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for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
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bdp->cbd_bufaddr = virt_to_bus(mem_addr);
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bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
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bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
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mem_addr += pinfo->rx_fifosize;
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}
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bdp->cbd_bufaddr = virt_to_bus(mem_addr);
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bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
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bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
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/* Set the physical address of the host memory
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@ -658,12 +696,12 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
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mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
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bdp = pinfo->tx_cur = pinfo->tx_bd_base;
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for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
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bdp->cbd_bufaddr = virt_to_bus(mem_addr);
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bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
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bdp->cbd_sc = BD_SC_INTRPT;
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mem_addr += pinfo->tx_fifosize;
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}
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bdp->cbd_bufaddr = virt_to_bus(mem_addr);
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bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr);
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bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
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}
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@ -763,6 +801,8 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
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/* Using idle charater time requires some additional tuning. */
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up->smc_mrblr = pinfo->rx_fifosize;
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up->smc_maxidl = pinfo->rx_fifosize;
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up->smc_brklen = 0;
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up->smc_brkec = 0;
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up->smc_brkcr = 1;
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cpm_line_cr_cmd(line, CPM_CR_INIT_TRX);
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@ -796,7 +836,7 @@ static int cpm_uart_request_port(struct uart_port *port)
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/*
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* Setup any port IO, connect any baud rate generators,
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* etc. This is expected to be handled by board
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* dependant code
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* dependant code
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*/
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if (pinfo->set_lineif)
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pinfo->set_lineif(pinfo);
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@ -815,6 +855,10 @@ static int cpm_uart_request_port(struct uart_port *port)
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return ret;
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cpm_uart_initbd(pinfo);
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if (IS_SMC(pinfo))
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cpm_uart_init_smc(pinfo);
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else
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cpm_uart_init_scc(pinfo);
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return 0;
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}
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@ -869,7 +913,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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.flags = FLAG_SMC,
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = smc1_lineif,
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},
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@ -883,7 +927,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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.flags = FLAG_SMC,
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = smc2_lineif,
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#ifdef CONFIG_SERIAL_CPM_ALT_SMC2
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@ -899,9 +943,10 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc1_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC2] = {
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.port = {
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@ -912,9 +957,10 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc2_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC3] = {
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.port = {
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@ -925,9 +971,10 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc3_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC4] = {
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.port = {
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@ -938,9 +985,10 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc4_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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};
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@ -983,11 +1031,8 @@ static void cpm_uart_console_write(struct console *co, const char *s,
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* If the buffer address is in the CPM DPRAM, don't
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* convert it.
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*/
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if ((uint) (bdp->cbd_bufaddr) > (uint) CPM_ADDR)
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cp = (unsigned char *) (bdp->cbd_bufaddr);
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else
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cp = bus_to_virt(bdp->cbd_bufaddr);
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cp = cpm2cpu_addr(bdp->cbd_bufaddr);
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*cp = *s;
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bdp->cbd_datlen = 1;
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@ -1003,10 +1048,7 @@ static void cpm_uart_console_write(struct console *co, const char *s,
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while ((bdp->cbd_sc & BD_SC_READY) != 0)
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;
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if ((uint) (bdp->cbd_bufaddr) > (uint) CPM_ADDR)
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cp = (unsigned char *) (bdp->cbd_bufaddr);
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else
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cp = bus_to_virt(bdp->cbd_bufaddr);
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cp = cpm2cpu_addr(bdp->cbd_bufaddr);
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*cp = 13;
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bdp->cbd_datlen = 1;
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@ -1045,7 +1087,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
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port =
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(struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
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pinfo = (struct uart_cpm_port *)port;
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pinfo->flags |= FLAG_CONSOLE;
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if (options) {
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@ -1062,7 +1104,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
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/*
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* Setup any port IO, connect any baud rate generators,
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* etc. This is expected to be handled by board
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* dependant code
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* dependant code
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*/
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if (pinfo->set_lineif)
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pinfo->set_lineif(pinfo);
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@ -5,7 +5,7 @@
|
||||
*
|
||||
* Maintainer: Kumar Gala (kumar.gala@freescale.com) (CPM2)
|
||||
* Pantelis Antoniou (panto@intracom.gr) (CPM1)
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2004 Freescale Semiconductor, Inc.
|
||||
* (C) 2004 Intracom, S.A.
|
||||
*
|
||||
@ -82,6 +82,17 @@ void cpm_line_cr_cmd(int line, int cmd)
|
||||
void smc1_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile cpm8xx_t *cp = cpmp;
|
||||
|
||||
(void)cp; /* fix warning */
|
||||
#if defined (CONFIG_MPC885ADS)
|
||||
/* Enable SMC1 transceivers */
|
||||
{
|
||||
cp->cp_pepar |= 0x000000c0;
|
||||
cp->cp_pedir &= ~0x000000c0;
|
||||
cp->cp_peso &= ~0x00000040;
|
||||
cp->cp_peso |= 0x00000080;
|
||||
}
|
||||
#elif defined (CONFIG_MPC86XADS)
|
||||
unsigned int iobits = 0x000000c0;
|
||||
|
||||
if (!pinfo->is_portb) {
|
||||
@ -93,41 +104,33 @@ void smc1_lineif(struct uart_cpm_port *pinfo)
|
||||
((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
|
||||
((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MPC885ADS
|
||||
/* Enable SMC1 transceivers */
|
||||
{
|
||||
volatile uint __iomem *bcsr1 = ioremap(BCSR1, 4);
|
||||
uint tmp;
|
||||
|
||||
tmp = in_be32(bcsr1);
|
||||
tmp &= ~BCSR1_RS232EN_1;
|
||||
out_be32(bcsr1, tmp);
|
||||
iounmap(bcsr1);
|
||||
}
|
||||
#endif
|
||||
|
||||
pinfo->brg = 1;
|
||||
}
|
||||
|
||||
void smc2_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
#ifdef CONFIG_MPC885ADS
|
||||
volatile cpm8xx_t *cp = cpmp;
|
||||
volatile uint __iomem *bcsr1;
|
||||
uint tmp;
|
||||
|
||||
(void)cp; /* fix warning */
|
||||
#if defined (CONFIG_MPC885ADS)
|
||||
cp->cp_pepar |= 0x00000c00;
|
||||
cp->cp_pedir &= ~0x00000c00;
|
||||
cp->cp_peso &= ~0x00000400;
|
||||
cp->cp_peso |= 0x00000800;
|
||||
#elif defined (CONFIG_MPC86XADS)
|
||||
unsigned int iobits = 0x00000c00;
|
||||
|
||||
if (!pinfo->is_portb) {
|
||||
cp->cp_pbpar |= iobits;
|
||||
cp->cp_pbdir &= ~iobits;
|
||||
cp->cp_pbodr &= ~iobits;
|
||||
} else {
|
||||
((immap_t *)IMAP_ADDR)->im_ioport.iop_papar |= iobits;
|
||||
((immap_t *)IMAP_ADDR)->im_ioport.iop_padir &= ~iobits;
|
||||
((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
|
||||
}
|
||||
|
||||
/* Enable SMC2 transceivers */
|
||||
bcsr1 = ioremap(BCSR1, 4);
|
||||
tmp = in_be32(bcsr1);
|
||||
tmp &= ~BCSR1_RS232EN_2;
|
||||
out_be32(bcsr1, tmp);
|
||||
iounmap(bcsr1);
|
||||
#endif
|
||||
|
||||
pinfo->brg = 2;
|
||||
@ -158,7 +161,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate DP-Ram and memory buffers. We need to allocate a transmit and
|
||||
* Allocate DP-Ram and memory buffers. We need to allocate a transmit and
|
||||
* receive buffer descriptors from dual port ram, and a character
|
||||
* buffer area from host mem. If we are allocating for the console we need
|
||||
* to do it from bootmem
|
||||
@ -185,6 +188,8 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
|
||||
memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
|
||||
L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
|
||||
if (is_con) {
|
||||
/* was hostalloc but changed cause it blows away the */
|
||||
/* large tlb mapping when pinning the kernel area */
|
||||
mem_addr = (u8 *) cpm_dpram_addr(cpm_dpalloc(memsz, 8));
|
||||
dma_addr = 0;
|
||||
} else
|
||||
|
||||
Loading…
Reference in New Issue
Block a user