x86/insn: Add Control-flow Enforcement (CET) instructions to the opcode map
Add the following CET instructions to the opcode map:
INCSSP:
Increment Shadow Stack pointer (SSP).
RDSSP:
Read SSP into a GPR.
SAVEPREVSSP:
Use "previous ssp" token at top of current Shadow Stack (SHSTK) to
create a "restore token" on the previous (outgoing) SHSTK.
RSTORSSP:
Restore from a "restore token" to SSP.
WRSS:
Write to kernel-mode SHSTK (kernel-mode instruction).
WRUSS:
Write to user-mode SHSTK (kernel-mode instruction).
SETSSBSY:
Verify the "supervisor token" pointed by MSR_IA32_PL0_SSP, set the
token busy, and set then Shadow Stack pointer(SSP) to the value of
MSR_IA32_PL0_SSP.
CLRSSBSY:
Verify the "supervisor token" and clear its busy bit.
ENDBR64/ENDBR32:
Mark a valid 64/32 bit control transfer endpoint.
Detailed information of CET instructions can be found in Intel Software
Developer's Manual.
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi v. Shankar <ravi.v.shankar@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Link: http://lore.kernel.org/lkml/20200204171425.28073-2-yu-cheng.yu@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Yu-cheng Yu
Arnaldo Carvalho de Melo
parent
e4ffd066ff
commit
315a4af8cd
@ -366,7 +366,7 @@ AVXcode: 1
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1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
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1c: Grp20 (1A),(1C)
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1d:
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1e:
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1e: Grp21 (1A)
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1f: NOP Ev
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# 0x0f 0x20-0x2f
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20: MOV Rd,Cd
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@ -803,8 +803,8 @@ f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
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f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
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f2: ANDN Gy,By,Ey (v)
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f3: Grp17 (1A)
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f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
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f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
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f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSSD/Q My,Gy (66)
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f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy
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f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
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f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3)
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f9: MOVDIRI My,Gy
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@ -970,7 +970,7 @@ GrpTable: Grp7
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2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
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3: LIDT Ms
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4: SMSW Mw/Rv
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5: rdpkru (110),(11B) | wrpkru (111),(11B)
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5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
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6: LMSW Ew
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7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
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EndTable
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@ -1041,8 +1041,8 @@ GrpTable: Grp15
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2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
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3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
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4: XSAVE | ptwrite Ey (F3),(11B)
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5: XRSTOR | lfence (11B)
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6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B)
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5: XRSTOR | lfence (11B) | INCSSPD/Q Ry (F3),(11B)
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6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)
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7: clflush | clflushopt (66) | sfence (11B)
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EndTable
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@ -1077,6 +1077,11 @@ GrpTable: Grp20
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0: cldemote Mb
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EndTable
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GrpTable: Grp21
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1: RDSSPD/Q Ry (F3),(11B)
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7: ENDBR64 (F3),(010),(11B) | ENDBR32 (F3),(011),(11B)
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EndTable
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# AMD's Prefetch Group
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GrpTable: GrpP
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0: PREFETCH
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@ -366,7 +366,7 @@ AVXcode: 1
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1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
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1c: Grp20 (1A),(1C)
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1d:
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1e:
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1e: Grp21 (1A)
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1f: NOP Ev
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# 0x0f 0x20-0x2f
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20: MOV Rd,Cd
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@ -803,8 +803,8 @@ f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
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f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
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f2: ANDN Gy,By,Ey (v)
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f3: Grp17 (1A)
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f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
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f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
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f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSSD/Q My,Gy (66)
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f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy
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f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
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f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3)
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f9: MOVDIRI My,Gy
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@ -970,7 +970,7 @@ GrpTable: Grp7
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2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
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3: LIDT Ms
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4: SMSW Mw/Rv
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5: rdpkru (110),(11B) | wrpkru (111),(11B)
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5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
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6: LMSW Ew
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7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
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EndTable
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@ -1041,8 +1041,8 @@ GrpTable: Grp15
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2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
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3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
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4: XSAVE | ptwrite Ey (F3),(11B)
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5: XRSTOR | lfence (11B)
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6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B)
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5: XRSTOR | lfence (11B) | INCSSPD/Q Ry (F3),(11B)
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6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)
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7: clflush | clflushopt (66) | sfence (11B)
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EndTable
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@ -1077,6 +1077,11 @@ GrpTable: Grp20
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0: cldemote Mb
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EndTable
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GrpTable: Grp21
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1: RDSSPD/Q Ry (F3),(11B)
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7: ENDBR64 (F3),(010),(11B) | ENDBR32 (F3),(011),(11B)
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EndTable
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# AMD's Prefetch Group
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GrpTable: GrpP
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0: PREFETCH
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