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spi: meson-spicc: support max 80MHz clock

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The SPICC controller in Meson-AXG is capable of running at 80M clock.
The ASIC IP is improved and the clock is actually running higher than
previous old SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20200312133131.26430-5-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Neil Armstrong 2020-03-12 14:31:26 +01:00 committed by Mark Brown
parent 3e0cf4d3fc
commit 3196816ff6
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 6 additions and 6 deletions
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12
drivers/spi/spi-meson-spicc.c
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@ -35,7 +35,6 @@
* to have a CS go down over the full transfer
*/
#define SPICC_MAX_FREQ 30000000
#define SPICC_MAX_BURST 128
/* Register Map */
@ -132,6 +131,7 @@
#define SPICC_FIFO_HALF 10
struct meson_spicc_data {
unsigned int max_speed_hz;
bool has_oen;
bool has_enhance_clk_div;
};
@ -693,11 +693,9 @@ static int meson_spicc_probe(struct platform_device *pdev)
master->transfer_one = meson_spicc_transfer_one;
master->use_gpio_descriptors = true;
/* Setup max rate according to the Meson GX datasheet */
if ((rate >> 2) > SPICC_MAX_FREQ)
master->max_speed_hz = SPICC_MAX_FREQ;
else
master->max_speed_hz = rate >> 2;
/* Setup max rate according to the Meson datasheet */
master->max_speed_hz = min_t(unsigned int, rate >> 1,
spicc->data->max_speed_hz);
meson_spicc_oen_enable(spicc);
@ -737,9 +735,11 @@ static int meson_spicc_remove(struct platform_device *pdev)
}
static const struct meson_spicc_data meson_spicc_gx_data = {
.max_speed_hz = 30000000,
};
static const struct meson_spicc_data meson_spicc_axg_data = {
.max_speed_hz = 80000000,
.has_oen = true,
.has_enhance_clk_div = true,
};