KVM: emulator: emulate SALC
This is an almost-undocumented instruction available in 32-bit mode. I say "almost" undocumented because AMD documents it in their opcode maps just to say that it is unavailable in 64-bit mode (sections "A.2.1 One-Byte Opcodes" and "B.3 Invalid and Reassigned Instructions in 64-Bit Mode"). It is roughly equivalent to "sbb %al, %al" except it does not set the flags. Use fastop to emulate it, but do not use the opcode directly because it would fail if the host is 64-bit! Reported-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com> Cc: stable@vger.kernel.org # 3.9 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
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@ -535,6 +535,9 @@ FOP_SETCC(setle)
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FOP_SETCC(setnle)
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FOP_END;
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FOP_START(salc) "pushf; sbb %al, %al; popf \n\t" FOP_RET
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FOP_END;
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#define __emulate_1op_rax_rdx(ctxt, _op, _suffix, _ex) \
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do { \
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unsigned long _tmp; \
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@ -3961,7 +3964,8 @@ static const struct opcode opcode_table[256] = {
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G(Src2One | ByteOp, group2), G(Src2One, group2),
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G(Src2CL | ByteOp, group2), G(Src2CL, group2),
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I(DstAcc | SrcImmUByte | No64, em_aam),
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I(DstAcc | SrcImmUByte | No64, em_aad), N,
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I(DstAcc | SrcImmUByte | No64, em_aad),
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F(DstAcc | ByteOp | No64, em_salc),
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I(DstAcc | SrcXLat | ByteOp, em_mov),
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/* 0xD8 - 0xDF */
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N, E(0, &escape_d9), N, E(0, &escape_db), N, E(0, &escape_dd), N, N,
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