drm/msm/adreno: fix CP cycles stat retrieval on a7xx
a7xx_submit() should use the a7xx variant of the RBBM_PERFCTR_CP register for retrieving the CP cycles value before and after the submitted command stream execution. Signed-off-by: Zan Dobersek <zdobersek@igalia.com> Fixes: af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support") Patchwork: https://patchwork.freedesktop.org/patch/588445/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -284,7 +284,7 @@ static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
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a6xx_set_pagetable(a6xx_gpu, ring, submit->queue->ctx);
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get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0),
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get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0),
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rbmemptr_stats(ring, index, cpcycles_start));
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get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER,
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rbmemptr_stats(ring, index, alwayson_start));
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@ -330,7 +330,7 @@ static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
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OUT_PKT7(ring, CP_SET_MARKER, 1);
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OUT_RING(ring, 0x00e); /* IB1LIST end */
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get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0),
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get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0),
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rbmemptr_stats(ring, index, cpcycles_end));
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get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER,
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rbmemptr_stats(ring, index, alwayson_end));
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