Merge branch 'v6.9-armsoc/dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into for-next
* 'v6.9-armsoc/dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Fix USB interface compatible string on kobol-helios64 arm64: dts: rockchip: regulator for sd needs to be always on for BPI-R2Pro dt-bindings: rockchip: grf: Add missing type to 'pcie-phy' node arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 2 arm64: dts: rockchip: drop redundant disable-gpios in Lubancat 1 arm64: dts: rockchip: drop redundant pcie-reset-suspend in Scarlet Dumo arm64: dts: rockchip: mark system power controller and fix typo on orangepi-5-plus arm64: dts: rockchip: Designate the system power controller on QuartzPro64 arm64: dts: rockchip: drop panel port unit address in GRU Scarlet arm64: dts: rockchip: Remove unsupported node from the Pinebook Pro dts arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi CM5 arm64: dts: rockchip: add regulators for PCIe on RK3399 Puma Haikou arm64: dts: rockchip: enable internal pull-up on PCIE_WAKE# for RK3399 Puma arm64: dts: rockchip: enable internal pull-up on Q7_USB_ID for RK3399 Puma arm64: dts: rockchip: fix alphabetical ordering RK3399 puma arm64: dts: rockchip: enable internal pull-up for Q7_THRM# on RK3399 Puma arm64: dts: rockchip: set PHY address of MT7531 switch to 0x1f Link: https://lore.kernel.org/r/3413596.CbtlEUcBR6@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
32a1eaa986
@ -171,6 +171,7 @@ allOf:
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unevaluatedProperties: false
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pcie-phy:
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type: object
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description:
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Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
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@ -663,7 +663,7 @@ camera: &i2c7 {
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port@1 {
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reg = <1>;
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mipi1_in_panel: endpoint@1 {
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mipi1_in_panel: endpoint {
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remote-endpoint = <&mipi1_out_panel>;
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};
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};
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@ -689,7 +689,6 @@ camera: &i2c7 {
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ep-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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/* PERST# asserted in S3 */
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pcie-reset-suspend = <1>;
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vpcie3v3-supply = <&wlan_3v3>;
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vpcie1v8-supply = <&pp1800_pcie>;
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@ -611,7 +611,7 @@
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#size-cells = <0>;
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interface@0 { /* interface 0 of configuration 1 */
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compatible = "usbbda,8156.config1.0";
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compatible = "usbifbda,8156.config1.0";
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reg = <0 1>;
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};
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};
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@ -779,7 +779,6 @@
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};
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&pcie0 {
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bus-scan-delay-ms = <1000>;
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ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
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num-lanes = <4>;
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pinctrl-names = "default";
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@ -194,6 +194,8 @@
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_clkreqn_cpm>;
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vpcie3v3-supply = <&vcc3v3_baseboard>;
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vpcie12v-supply = <&dc_12v>;
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status = "okay";
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};
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@ -79,6 +79,26 @@
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regulator-max-microvolt = <5000000>;
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};
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vcca_0v9: vcca-0v9-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcca_0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc_1v8>;
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};
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vcca_1v8: vcca-1v8-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcca_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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@ -416,16 +436,28 @@
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gpio1830-supply = <&vcc_1v8>;
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};
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&pmu_io_domains {
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status = "okay";
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pmu1830-supply = <&vcc_1v8>;
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&pcie0 {
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/* PCIe PHY supplies */
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vpcie0v9-supply = <&vcca_0v9>;
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vpcie1v8-supply = <&vcca_1v8>;
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};
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&pwm2 {
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status = "okay";
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&pcie_clkreqn_cpm {
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rockchip,pins =
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<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&q7_thermal_pin>;
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gpios {
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q7_thermal_pin: q7-thermal-pin {
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rockchip,pins =
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<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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i2c8 {
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i2c8_xfer_a: i2c8-xfer {
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rockchip,pins =
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@ -458,11 +490,20 @@
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usb3 {
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usb3_id: usb3-id {
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rockchip,pins =
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<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pmu_io_domains {
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status = "okay";
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pmu1830-supply = <&vcc_1v8>;
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};
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&pwm2 {
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status = "okay";
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};
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&sdhci {
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/*
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* Signal integrity isn't great at 200MHz but 100MHz has proven stable
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@ -447,7 +447,6 @@
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&pcie2x1 {
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reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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@ -416,6 +416,8 @@
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vccio_sd: LDO_REG5 {
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regulator-name = "vccio_sd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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@ -525,9 +527,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <0>;
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reg = <0x1f>;
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ports {
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#address-cells = <1>;
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@ -523,7 +523,6 @@
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&pcie2x1 {
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reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_mini_pcie>;
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status = "okay";
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};
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@ -216,9 +216,9 @@
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pinctrl-0 = <&i2c7m0_xfer>;
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status = "okay";
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es8316: audio-codec@11 {
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es8316: audio-codec@10 {
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compatible = "everest,es8316";
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reg = <0x11>;
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reg = <0x10>;
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assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
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assigned-clock-rates = <12288000>;
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clocks = <&cru I2S0_8CH_MCLKOUT>;
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@ -485,6 +485,7 @@
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pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
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<&rk806_dvs2_null>, <&rk806_dvs3_null>;
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spi-max-frequency = <1000000>;
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system-power-controller;
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vcc1-supply = <&vcc5v0_sys>;
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vcc2-supply = <&vcc5v0_sys>;
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@ -506,7 +507,7 @@
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#gpio-cells = <2>;
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rk806_dvs1_null: dvs1-null-pins {
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pins = "gpio_pwrctrl2";
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pins = "gpio_pwrctrl1";
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function = "pin_fun0";
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};
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@ -456,6 +456,7 @@
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<&rk806_dvs2_null>, <&rk806_dvs3_null>;
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pinctrl-names = "default";
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spi-max-frequency = <1000000>;
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system-power-controller;
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vcc1-supply = <&vcc4v0_sys>;
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vcc2-supply = <&vcc4v0_sys>;
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