drm/amd/pm: correct SMU13.0.0 pstate profiling clock settings
Correct the pstate standard/peak profiling mode clock settings for SMU13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0.x
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@ -1307,9 +1307,17 @@ static int smu_v13_0_0_populate_umd_state_clk(struct smu_context *smu)
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&dpm_context->dpm_tables.fclk_table;
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struct smu_umd_pstate_table *pstate_table =
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&smu->pstate_table;
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struct smu_table_context *table_context = &smu->smu_table;
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PPTable_t *pptable = table_context->driver_pptable;
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DriverReportedClocks_t driver_clocks =
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pptable->SkuTable.DriverReportedClocks;
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pstate_table->gfxclk_pstate.min = gfx_table->min;
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pstate_table->gfxclk_pstate.peak = gfx_table->max;
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if (driver_clocks.GameClockAc &&
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(driver_clocks.GameClockAc < gfx_table->max))
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pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc;
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else
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pstate_table->gfxclk_pstate.peak = gfx_table->max;
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pstate_table->uclk_pstate.min = mem_table->min;
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pstate_table->uclk_pstate.peak = mem_table->max;
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@ -1326,12 +1334,12 @@ static int smu_v13_0_0_populate_umd_state_clk(struct smu_context *smu)
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pstate_table->fclk_pstate.min = fclk_table->min;
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pstate_table->fclk_pstate.peak = fclk_table->max;
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/*
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* For now, just use the mininum clock frequency.
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* TODO: update them when the real pstate settings available
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*/
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pstate_table->gfxclk_pstate.standard = gfx_table->min;
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pstate_table->uclk_pstate.standard = mem_table->min;
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if (driver_clocks.BaseClockAc &&
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driver_clocks.BaseClockAc < gfx_table->max)
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pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc;
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else
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pstate_table->gfxclk_pstate.standard = gfx_table->max;
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pstate_table->uclk_pstate.standard = mem_table->max;
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pstate_table->socclk_pstate.standard = soc_table->min;
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pstate_table->vclk_pstate.standard = vclk_table->min;
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pstate_table->dclk_pstate.standard = dclk_table->min;
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