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spi: tegra114: terminate dma and reset on transfer timeout

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Fixes: terminate DMA and perform controller reset on transfer timeout
to clear the FIFO's and errors.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sowjanya Komatineni 2019-03-26 22:56:27 -07:00 committed by Mark Brown
parent 1a89ac5b91
commit 32bd1a9551
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GPG Key ID: 24D68B725D5487D0
1 changed files with 9 additions and 0 deletions
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9
drivers/spi/spi-tegra114.c
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@ -869,7 +869,16 @@ static int tegra_spi_transfer_one_message(struct spi_master *master,
if (WARN_ON(ret == 0)) {
dev_err(tspi->dev,
"spi transfer timeout, err %d\n", ret);
if (tspi->is_curr_dma_xfer &&
(tspi->cur_direction & DATA_DIR_TX))
dmaengine_terminate_all(tspi->tx_dma_chan);
if (tspi->is_curr_dma_xfer &&
(tspi->cur_direction & DATA_DIR_RX))
dmaengine_terminate_all(tspi->rx_dma_chan);
ret = -EIO;
reset_control_assert(tspi->rst);
udelay(2);
reset_control_deassert(tspi->rst);
goto complete_xfer;
}