ghes_edac: do a better job of filling EDAC DIMM info
Instead of just faking a random value for the DIMM data, get the information that it is available via DMI table. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
f04c62a703
commit
32fa1f53c2
@ -11,6 +11,7 @@
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#include <acpi/ghes.h>
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#include <linux/edac.h>
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#include <linux/dmi.h>
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#include "edac_core.h"
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#define GHES_PFX "ghes_edac: "
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@ -26,6 +27,155 @@ static LIST_HEAD(ghes_reglist);
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static DEFINE_MUTEX(ghes_edac_lock);
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static int ghes_edac_mc_num;
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/* Memory Device - Type 17 of SMBIOS spec */
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struct memdev_dmi_entry {
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u8 type;
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u8 length;
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u16 handle;
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u16 phys_mem_array_handle;
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u16 mem_err_info_handle;
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u16 total_width;
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u16 data_width;
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u16 size;
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u8 form_factor;
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u8 device_set;
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u8 device_locator;
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u8 bank_locator;
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u8 memory_type;
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u16 type_detail;
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u16 speed;
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u8 manufacturer;
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u8 serial_number;
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u8 asset_tag;
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u8 part_number;
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u8 attributes;
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u32 extended_size;
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u16 conf_mem_clk_speed;
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} __attribute__((__packed__));
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struct ghes_edac_dimm_fill {
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struct mem_ctl_info *mci;
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unsigned count;
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};
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char *memory_type[] = {
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[MEM_EMPTY] = "EMPTY",
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[MEM_RESERVED] = "RESERVED",
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[MEM_UNKNOWN] = "UNKNOWN",
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[MEM_FPM] = "FPM",
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[MEM_EDO] = "EDO",
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[MEM_BEDO] = "BEDO",
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[MEM_SDR] = "SDR",
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[MEM_RDR] = "RDR",
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[MEM_DDR] = "DDR",
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[MEM_RDDR] = "RDDR",
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[MEM_RMBS] = "RMBS",
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[MEM_DDR2] = "DDR2",
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[MEM_FB_DDR2] = "FB_DDR2",
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[MEM_RDDR2] = "RDDR2",
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[MEM_XDR] = "XDR",
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[MEM_DDR3] = "DDR3",
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[MEM_RDDR3] = "RDDR3",
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};
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static void ghes_edac_count_dimms(const struct dmi_header *dh, void *arg)
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{
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int *num_dimm = arg;
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if (dh->type == DMI_ENTRY_MEM_DEVICE)
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(*num_dimm)++;
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}
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static void ghes_edac_dmidecode(const struct dmi_header *dh, void *arg)
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{
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struct ghes_edac_dimm_fill *dimm_fill = arg;
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struct mem_ctl_info *mci = dimm_fill->mci;
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if (dh->type == DMI_ENTRY_MEM_DEVICE) {
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struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
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struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
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mci->n_layers,
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dimm_fill->count, 0, 0);
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if (entry->size == 0xffff) {
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pr_info(GHES_PFX "Can't get dimm size\n");
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dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
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} else if (entry->size == 0x7fff) {
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dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
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} else {
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if (entry->size & 1 << 15)
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dimm->nr_pages = MiB_TO_PAGES((entry->size &
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0x7fff) << 10);
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else
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dimm->nr_pages = MiB_TO_PAGES(entry->size);
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}
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switch (entry->memory_type) {
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case 0x12:
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if (entry->type_detail & 1 << 13)
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dimm->mtype = MEM_RDDR;
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else
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dimm->mtype = MEM_DDR;
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break;
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case 0x13:
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if (entry->type_detail & 1 << 13)
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dimm->mtype = MEM_RDDR2;
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else
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dimm->mtype = MEM_DDR2;
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break;
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case 0x14:
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dimm->mtype = MEM_FB_DDR2;
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break;
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case 0x18:
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if (entry->type_detail & 1 << 13)
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dimm->mtype = MEM_RDDR3;
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else
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dimm->mtype = MEM_DDR3;
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break;
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default:
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if (entry->type_detail & 1 << 6)
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dimm->mtype = MEM_RMBS;
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else if ((entry->type_detail & ((1 << 7) | (1 << 13)))
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== ((1 << 7) | (1 << 13)))
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dimm->mtype = MEM_RDR;
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else if (entry->type_detail & 1 << 7)
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dimm->mtype = MEM_SDR;
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else if (entry->type_detail & 1 << 9)
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dimm->mtype = MEM_EDO;
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else
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dimm->mtype = MEM_UNKNOWN;
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}
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/*
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* Actually, we can only detect if the memory has bits for
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* checksum or not
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*/
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if (entry->total_width == entry->data_width)
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dimm->edac_mode = EDAC_NONE;
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else
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dimm->edac_mode = EDAC_SECDED;
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dimm->dtype = DEV_UNKNOWN;
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dimm->grain = 128; /* Likely, worse case */
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/*
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* FIXME: It shouldn't be hard to also fill the DIMM labels
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*/
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if (dimm->nr_pages) {
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pr_info(GHES_PFX "DIMM%i: %s size = %d MB%s\n",
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dimm_fill->count, memory_type[dimm->mtype],
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PAGES_TO_MiB(dimm->nr_pages),
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(dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
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pr_info(GHES_PFX "\ttype %d, detail 0x%02x, width %d(total %d)\n",
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entry->memory_type, entry->type_detail,
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entry->total_width, entry->data_width);
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}
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dimm_fill->count++;
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}
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}
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void ghes_edac_report_mem_error(struct ghes *ghes, int sev,
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struct cper_sec_mem_err *mem_err)
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{
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@ -86,15 +236,24 @@ EXPORT_SYMBOL_GPL(ghes_edac_report_mem_error);
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int ghes_edac_register(struct ghes *ghes, struct device *dev)
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{
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int rc;
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bool fake = false;
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int rc, num_dimm = 0;
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struct mem_ctl_info *mci;
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struct edac_mc_layer layers[1];
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struct csrow_info *csrow;
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struct dimm_info *dimm;
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struct ghes_edac_pvt *pvt;
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struct ghes_edac_dimm_fill dimm_fill;
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/* Get the number of DIMMs */
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dmi_walk(ghes_edac_count_dimms, &num_dimm);
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/* Check if we've got a bogus BIOS */
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if (num_dimm == 0) {
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fake = true;
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num_dimm = 1;
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}
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layers[0].type = EDAC_MC_LAYER_ALL_MEM;
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layers[0].size = 1;
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layers[0].size = num_dimm;
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layers[0].is_virt_csrow = true;
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/*
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@ -102,6 +261,8 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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* to avoid duplicated memory controller numbers
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*/
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mutex_lock(&ghes_edac_lock);
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pr_info("ghes_edac#%d: allocating space for %d dimms\n",
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ghes_edac_mc_num, num_dimm);
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mci = edac_mc_alloc(ghes_edac_mc_num, ARRAY_SIZE(layers), layers,
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sizeof(*pvt));
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if (!mci) {
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@ -125,15 +286,22 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
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mci->ctl_name = "ghes_edac";
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mci->dev_name = "ghes";
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csrow = mci->csrows[0];
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dimm = csrow->channels[0]->dimm;
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if (!fake) {
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/* Fill DIMM info from DMI */
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dimm_fill.count = 0;
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dimm_fill.mci = mci;
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dmi_walk(ghes_edac_dmidecode, &dimm_fill);
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} else {
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struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
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mci->n_layers, 0, 0, 0);
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/* FIXME: FAKE DATA */
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dimm->nr_pages = 1000;
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dimm->grain = 128;
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dimm->mtype = MEM_UNKNOWN;
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dimm->dtype = DEV_UNKNOWN;
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dimm->edac_mode = EDAC_SECDED;
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pr_info(GHES_PFX "Crappy BIOS detected. Faking DIMM EDAC data\n");
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dimm->nr_pages = 1000;
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dimm->grain = 128;
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dimm->mtype = MEM_UNKNOWN;
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dimm->dtype = DEV_UNKNOWN;
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dimm->edac_mode = EDAC_SECDED;
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}
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rc = edac_mc_add_mc(mci);
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if (rc < 0) {
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