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ARM: dts: ux500: Add GPS to Janice device tree

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This adds the CSR GSD4t GPS to the Janice device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2022-03-05 00:37:37 +01:00
parent 5c7502397e
commit 330e01653a
1 changed files with 39 additions and 1 deletions
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40
arch/arm/boot/dts/ste-ux500-samsung-janice.dts
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@ -485,7 +485,26 @@
/* CTS/RTS is not used, CTS is repurposed as GPIO */
pinctrl-0 = <&u1rxtx_a_1_default>;
pinctrl-1 = <&u1rxtx_a_1_sleep>;
/* FIXME: add a device for the GPS here */
gnss {
/*
* The Low Noise Amplifier (LNA) power and enablement is controlled
* autonomously by the GSD4t.
* Janice has a SiRFstarIV-based GSD4t
* Golden has a SiRFstarV 5t-based CSRG05TA03-ICJE-R.
*/
compatible = "csr,gsd4t";
/* GPS_RSTN on GPIO21 */
reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
/* GPS_ON_OFF on GPIO96 */
sirf,onoff-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
/* GPS_1V8 (VSMPS2) */
vcc-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default";
pinctrl-0 = <&gsd4t_janice_default>;
/* According to /etc/sirfgps.conf */
current-speed = <460800>;
};
};
/* Debugging console UART connected to TSU6111RSVR (FSA880) */
@ -945,4 +964,23 @@
};
};
};
gsd4t {
gsd4t_janice_default: gsd4t_janice {
/* Reset line, start out asserted */
janice_cfg1 {
pins = "GPIO21_AB3";
ste,config = <&gpio_out_lo>;
};
/* GPS_ON_OFF, start out deasserted (off) */
janice_cfg2 {
pins = "GPIO96_D8";
ste,config = <&gpio_out_lo>;
};
/* Unused power enablement line, used in R0.0 and R0.1 boards */
janice_cfg3 {
pins = "GPIO86_C6";
ste,config = <&gpio_in_pd>;
};
};
};
};