modpost: fix section_mismatch message for R_ARM_THM_{CALL,JUMP24,JUMP19}
addend_arm_rel() processes R_ARM_THM_CALL, R_ARM_THM_JUMP24, R_ARM_THM_JUMP19 in a wrong way. Here, test code. [test code for R_ARM_THM_JUMP24] .section .init.text,"ax" bar: bx lr .section .text,"ax" .globl foo foo: b bar [test code for R_ARM_THM_CALL] .section .init.text,"ax" bar: bx lr .section .text,"ax" .globl foo foo: push {lr} bl bar pop {pc} If you compile it with CONFIG_THUMB2_KERNEL=y, modpost will show the symbol name, (unknown). WARNING: modpost: vmlinux.o: section mismatch in reference: foo (section: .text) -> (unknown) (section: .init.text) (You need to use GNU linker instead of LLD to reproduce it.) Fix the code to make modpost show the correct symbol name. I checked arch/arm/kernel/module.c to learn the encoding of R_ARM_THM_CALL and R_ARM_THM_JUMP24. The module does not support R_ARM_THM_JUMP19, but I checked its encoding in ARM ARM. The '+4' is the compensation for pc-relative instruction. It is documented in "ELF for the Arm Architecture" [1]. "If the relocation is pc-relative then compensation for the PC bias (the PC value is 8 bytes ahead of the executing instruction in Arm state and 4 bytes in Thumb state) must be encoded in the relocation by the object producer." [1]: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst Fixes: c9698e5cd6ad ("ARM: 7964/1: Detect section mismatches in thumb relocations") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
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@ -1276,7 +1276,7 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
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unsigned int r_typ = ELF_R_TYPE(r->r_info);
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Elf_Sym *sym = elf->symtab_start + ELF_R_SYM(r->r_info);
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void *loc = reloc_location(elf, sechdr, r);
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uint32_t inst, upper, lower;
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uint32_t inst, upper, lower, sign, j1, j2;
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int32_t offset;
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switch (r_typ) {
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@ -1309,13 +1309,54 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
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15);
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r->r_addend = offset + sym->st_value;
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break;
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case R_ARM_THM_JUMP19:
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/*
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* Encoding T3:
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* S = upper[10]
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* imm6 = upper[5:0]
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* J1 = lower[13]
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* J2 = lower[11]
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* imm11 = lower[10:0]
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* imm32 = SignExtend(S:J2:J1:imm6:imm11:'0')
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*/
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upper = TO_NATIVE(*(uint16_t *)loc);
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lower = TO_NATIVE(*((uint16_t *)loc + 1));
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sign = (upper >> 10) & 1;
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j1 = (lower >> 13) & 1;
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j2 = (lower >> 11) & 1;
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offset = sign_extend32((sign << 20) | (j2 << 19) | (j1 << 18) |
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((upper & 0x03f) << 12) |
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((lower & 0x07ff) << 1),
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20);
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r->r_addend = offset + sym->st_value + 4;
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break;
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case R_ARM_THM_CALL:
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case R_ARM_THM_JUMP24:
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case R_ARM_THM_JUMP19:
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/* From ARM ABI: ((S + A) | T) - P */
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r->r_addend = (int)(long)(elf->hdr +
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sechdr->sh_offset +
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(r->r_offset - sechdr->sh_addr));
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/*
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* Encoding T4:
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* S = upper[10]
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* imm10 = upper[9:0]
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* J1 = lower[13]
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* J2 = lower[11]
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* imm11 = lower[10:0]
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* I1 = NOT(J1 XOR S)
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* I2 = NOT(J2 XOR S)
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* imm32 = SignExtend(S:I1:I2:imm10:imm11:'0')
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*/
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upper = TO_NATIVE(*(uint16_t *)loc);
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lower = TO_NATIVE(*((uint16_t *)loc + 1));
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sign = (upper >> 10) & 1;
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j1 = (lower >> 13) & 1;
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j2 = (lower >> 11) & 1;
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offset = sign_extend32((sign << 24) |
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((~(j1 ^ sign) & 1) << 23) |
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((~(j2 ^ sign) & 1) << 22) |
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((upper & 0x03ff) << 12) |
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((lower & 0x07ff) << 1),
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24);
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r->r_addend = offset + sym->st_value + 4;
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break;
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default:
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return 1;
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