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dsa: lan9303: Migrate to PHYLINK

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This patch replaces the adjust_link api with the phylink apis that provide
equivalent functionality.

The remaining functionality from the adjust_link is now covered in the
phylink_mac_link_up api.

Removes:
.adjust_link
Adds:
.phylink_get_caps
.phylink_mac_link_up

Signed-off-by: Jerry Ray <jerry.ray@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jerry Ray 2023-01-17 14:57:02 -06:00 committed by David S. Miller
parent 56e23d91bc
commit 332bc552a4
1 changed files with 69 additions and 32 deletions
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101
drivers/net/dsa/lan9303-core.c
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@ -1064,37 +1064,6 @@ static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
return chip->ops->phy_write(chip, phy, regnum, val);
}
static void lan9303_adjust_link(struct dsa_switch *ds, int port,
struct phy_device *phydev)
{
int ctl;
/* On this device, we are only interested in doing something here if
* this is an xMII port. All other ports are 10/100 phys using MDIO
* to control there link settings.
*/
if (!IS_PORT_XMII(port))
return;
ctl = lan9303_phy_read(ds, port, MII_BMCR);
ctl &= ~BMCR_ANENABLE;
if (phydev->speed == SPEED_100)
ctl |= BMCR_SPEED100;
else if (phydev->speed == SPEED_10)
ctl &= ~BMCR_SPEED100;
else
dev_err(ds->dev, "unsupported speed: %d\n", phydev->speed);
if (phydev->duplex == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
else
ctl &= ~BMCR_FULLDPLX;
lan9303_phy_write(ds, port, MII_BMCR, ctl);
}
static int lan9303_port_enable(struct dsa_switch *ds, int port,
struct phy_device *phy)
{
@ -1291,13 +1260,81 @@ static int lan9303_port_mdb_del(struct dsa_switch *ds, int port,
return 0;
}
static void lan9303_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
struct lan9303 *chip = ds->priv;
dev_dbg(chip->dev, "%s(%d) entered.", __func__, port);
config->mac_capabilities = MAC_10 | MAC_100 | MAC_ASYM_PAUSE |
MAC_SYM_PAUSE;
if (port == 0) {
__set_bit(PHY_INTERFACE_MODE_RMII,
config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_MII,
config->supported_interfaces);
} else {
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
config->supported_interfaces);
/* Compatibility for phylib's default interface type when the
* phy-mode property is absent
*/
__set_bit(PHY_INTERFACE_MODE_GMII,
config->supported_interfaces);
}
/* This driver does not make use of the speed, duplex, pause or the
* advertisement in its mac_config, so it is safe to mark this driver
* as non-legacy.
*/
config->legacy_pre_march2020 = false;
}
static void lan9303_phylink_mac_link_up(struct dsa_switch *ds, int port,
unsigned int mode,
phy_interface_t interface,
struct phy_device *phydev, int speed,
int duplex, bool tx_pause,
bool rx_pause)
{
u32 ctl;
/* On this device, we are only interested in doing something here if
* this is the xMII port. All other ports are 10/100 phys using MDIO
* to control there link settings.
*/
if (!IS_PORT_XMII(port))
return;
ctl = lan9303_phy_read(ds, port, MII_BMCR);
ctl &= ~BMCR_ANENABLE;
if (speed == SPEED_100)
ctl |= BMCR_SPEED100;
else if (speed == SPEED_10)
ctl &= ~BMCR_SPEED100;
else
dev_err(ds->dev, "unsupported speed: %d\n", speed);
if (duplex == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
else
ctl &= ~BMCR_FULLDPLX;
lan9303_phy_write(ds, port, MII_BMCR, ctl);
}
static const struct dsa_switch_ops lan9303_switch_ops = {
.get_tag_protocol = lan9303_get_tag_protocol,
.setup = lan9303_setup,
.get_strings = lan9303_get_strings,
.phy_read = lan9303_phy_read,
.phy_write = lan9303_phy_write,
.adjust_link = lan9303_adjust_link,
.phylink_get_caps = lan9303_phylink_get_caps,
.phylink_mac_link_up = lan9303_phylink_mac_link_up,
.get_ethtool_stats = lan9303_get_ethtool_stats,
.get_sset_count = lan9303_get_sset_count,
.port_enable = lan9303_port_enable,