perf cs-etm: Configure contextID tracing in CPU-wide mode
When operating in CPU-wide mode being notified of contextID changes is required so that the decoding mechanic is aware of the process context switch. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki Poulouse <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/20190524173508.29044-2-mathieu.poirier@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Mathieu Poirier
Arnaldo Carvalho de Melo
parent
10981c8012
commit
3399ad9ac2
@ -35,8 +35,100 @@ struct cs_etm_recording {
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size_t snapshot_size;
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};
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static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = {
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[CS_ETM_ETMCCER] = "mgmt/etmccer",
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[CS_ETM_ETMIDR] = "mgmt/etmidr",
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};
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static const char *metadata_etmv4_ro[CS_ETMV4_PRIV_MAX] = {
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[CS_ETMV4_TRCIDR0] = "trcidr/trcidr0",
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[CS_ETMV4_TRCIDR1] = "trcidr/trcidr1",
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[CS_ETMV4_TRCIDR2] = "trcidr/trcidr2",
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[CS_ETMV4_TRCIDR8] = "trcidr/trcidr8",
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[CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus",
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};
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static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu);
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static int cs_etm_set_context_id(struct auxtrace_record *itr,
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struct perf_evsel *evsel, int cpu)
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{
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struct cs_etm_recording *ptr;
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struct perf_pmu *cs_etm_pmu;
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char path[PATH_MAX];
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int err = -EINVAL;
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u32 val;
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ptr = container_of(itr, struct cs_etm_recording, itr);
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cs_etm_pmu = ptr->cs_etm_pmu;
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if (!cs_etm_is_etmv4(itr, cpu))
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goto out;
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/* Get a handle on TRCIRD2 */
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snprintf(path, PATH_MAX, "cpu%d/%s",
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cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
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err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
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/* There was a problem reading the file, bailing out */
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if (err != 1) {
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pr_err("%s: can't read file %s\n",
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CORESIGHT_ETM_PMU_NAME, path);
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goto out;
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}
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/*
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* TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID tracing
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* is supported:
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* 0b00000 Context ID tracing is not supported.
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* 0b00100 Maximum of 32-bit Context ID size.
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* All other values are reserved.
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*/
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val = BMVAL(val, 5, 9);
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if (!val || val != 0x4) {
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err = -EINVAL;
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goto out;
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}
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/* All good, let the kernel know */
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evsel->attr.config |= (1 << ETM_OPT_CTXTID);
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err = 0;
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out:
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return err;
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}
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static int cs_etm_set_option(struct auxtrace_record *itr,
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struct perf_evsel *evsel, u32 option)
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{
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int i, err = -EINVAL;
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struct cpu_map *event_cpus = evsel->evlist->cpus;
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struct cpu_map *online_cpus = cpu_map__new(NULL);
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/* Set option of each CPU we have */
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for (i = 0; i < cpu__max_cpu(); i++) {
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if (!cpu_map__has(event_cpus, i) ||
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!cpu_map__has(online_cpus, i))
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continue;
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switch (option) {
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case ETM_OPT_CTXTID:
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err = cs_etm_set_context_id(itr, evsel, i);
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if (err)
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goto out;
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break;
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default:
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goto out;
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}
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}
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err = 0;
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out:
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cpu_map__put(online_cpus);
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return err;
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}
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static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr,
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struct record_opts *opts,
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const char *str)
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@ -105,8 +197,9 @@ static int cs_etm_recording_options(struct auxtrace_record *itr,
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container_of(itr, struct cs_etm_recording, itr);
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struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
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struct perf_evsel *evsel, *cs_etm_evsel = NULL;
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const struct cpu_map *cpus = evlist->cpus;
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struct cpu_map *cpus = evlist->cpus;
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bool privileged = (geteuid() == 0 || perf_event_paranoid() < 0);
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int err = 0;
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ptr->evlist = evlist;
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ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
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@ -241,19 +334,24 @@ static int cs_etm_recording_options(struct auxtrace_record *itr,
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/*
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* In the case of per-cpu mmaps, we need the CPU on the
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* AUX event.
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* AUX event. We also need the contextID in order to be notified
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* when a context switch happened.
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*/
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if (!cpu_map__empty(cpus))
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if (!cpu_map__empty(cpus)) {
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perf_evsel__set_sample_bit(cs_etm_evsel, CPU);
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err = cs_etm_set_option(itr, cs_etm_evsel, ETM_OPT_CTXTID);
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if (err)
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goto out;
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}
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/* Add dummy event to keep tracking */
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if (opts->full_auxtrace) {
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struct perf_evsel *tracking_evsel;
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int err;
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err = parse_events(evlist, "dummy:u", NULL);
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if (err)
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return err;
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goto out;
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tracking_evsel = perf_evlist__last(evlist);
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perf_evlist__set_tracking_event(evlist, tracking_evsel);
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@ -266,7 +364,8 @@ static int cs_etm_recording_options(struct auxtrace_record *itr,
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perf_evsel__set_sample_bit(tracking_evsel, TIME);
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}
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return 0;
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out:
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return err;
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}
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static u64 cs_etm_get_config(struct auxtrace_record *itr)
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@ -314,6 +413,8 @@ static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
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config_opts = cs_etm_get_config(itr);
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if (config_opts & BIT(ETM_OPT_CYCACC))
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config |= BIT(ETM4_CFG_BIT_CYCACC);
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if (config_opts & BIT(ETM_OPT_CTXTID))
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config |= BIT(ETM4_CFG_BIT_CTXTID);
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if (config_opts & BIT(ETM_OPT_TS))
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config |= BIT(ETM4_CFG_BIT_TS);
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if (config_opts & BIT(ETM_OPT_RETSTK))
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@ -363,19 +464,6 @@ cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
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(etmv3 * CS_ETMV3_PRIV_SIZE));
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}
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static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = {
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[CS_ETM_ETMCCER] = "mgmt/etmccer",
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[CS_ETM_ETMIDR] = "mgmt/etmidr",
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};
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static const char *metadata_etmv4_ro[CS_ETMV4_PRIV_MAX] = {
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[CS_ETMV4_TRCIDR0] = "trcidr/trcidr0",
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[CS_ETMV4_TRCIDR1] = "trcidr/trcidr1",
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[CS_ETMV4_TRCIDR2] = "trcidr/trcidr2",
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[CS_ETMV4_TRCIDR8] = "trcidr/trcidr8",
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[CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus",
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};
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static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu)
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{
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bool ret = false;
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@ -103,6 +103,18 @@ struct intlist *traceid_list;
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#define KiB(x) ((x) * 1024)
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#define MiB(x) ((x) * 1024 * 1024)
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/*
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* Create a contiguous bitmask starting at bit position @l and ending at
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* position @h. For example
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* GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.
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*
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* Carbon copy of implementation found in $KERNEL/include/linux/bitops.h
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*/
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#define GENMASK(h, l) \
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(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
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#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
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#define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64))
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#define __perf_cs_etmv3_magic 0x3030303030303030ULL
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