PCI: Export PCIe link retrain timeout

Convert LINK_RETRAIN_TIMEOUT from jiffies to milliseconds, accordingly
rename to PCIE_LINK_RETRAIN_TIMEOUT_MS, and make available via "pci.h" for
the PCI core to use.  Use in pcie_wait_for_link_delay().

Link: https://lore.kernel.org/r/alpine.DEB.2.21.2305310030280.59226@angie.orcam.me.uk
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Maciej W. Rozycki 2023-06-11 18:19:19 +01:00 committed by Bjorn Helgaas
parent 07a8d698de
commit 33a176abcc
3 changed files with 5 additions and 5 deletions

View File

@ -4867,7 +4867,7 @@ static int pci_pm_reset(struct pci_dev *dev, bool probe)
static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active,
int delay)
{
int timeout = 1000;
int timeout = PCIE_LINK_RETRAIN_TIMEOUT_MS;
bool ret;
u16 lnk_status;

View File

@ -11,6 +11,8 @@
#define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */
#define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000
extern const unsigned char pcie_link_speed[];
extern bool pci_early_dump;

View File

@ -90,8 +90,6 @@ static const char *policy_str[] = {
[POLICY_POWER_SUPERSAVE] = "powersupersave"
};
#define LINK_RETRAIN_TIMEOUT HZ
/*
* The L1 PM substate capability is only implemented in function 0 in a
* multi function device.
@ -198,14 +196,14 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
* @pdev: Device whose link to wait for.
*
* Return TRUE if successful, or FALSE if training has not completed
* within LINK_RETRAIN_TIMEOUT jiffies.
* within PCIE_LINK_RETRAIN_TIMEOUT_MS milliseconds.
*/
static bool pcie_wait_for_link_status(struct pci_dev *pdev)
{
unsigned long end_jiffies;
u16 lnksta;
end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT;
end_jiffies = jiffies + msecs_to_jiffies(PCIE_LINK_RETRAIN_TIMEOUT_MS);
do {
pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnksta);
if (!(lnksta & PCI_EXP_LNKSTA_LT))